Effect of Low Temperature Annealing on the Surface Conductivity of Si in the Si-SiO₂-Al System

Giant isotope effect in hot electron degradation of metal oxide silicon devices

“…The passivation process is described by the equation 6where is the passivated dangling bond [24]- [27]. These measurements indicate that for the oxides grown on Si(111), the density of the interface trap states in the middle of the forbidden gap decreases from 10 -10 cm eV to about 10 cm eV after the post-metal anneal process step [19]- [26]. The Si(100)/SiO material system, which is technologically more significant, exhibits the same qualitative behavior [28], [29].…”

“…Low temperature post-metal anneals (350-450 C in hydrogen ambients have been successfully used in MOS fabrication technologies to passivate the silicon dangling bonds and consequently to reduce Si/SiO interface trap charge density [19]- [23]. This treatment is imperative from a fabrication standpoint since silicon dangling bonds at the Si/SiO interface are electrically active and lead to the reduction of channel conductance and also result in deviations from the ideal capacitance-voltage characteristics.…”