Effect of improved contact on reliability of sub-60 nm carbon nanotube vias

Abstract

Advances in semiconductor technology due to the aggressive downward scaling of on-chip feature sizes have led to rapid rises in the resistivity and current density of interconnect conductors. As a result, current interconnect materials, Cu and W, are subject to performance and reliability constraints approaching or exceeding their physical limits. Therefore, alternative materials are being actively considered as potential replacements to meet such constraints. The carbon nanotube (CNT) is among the leading replacement candidates for on-chip interconnect vias due to its high aspect-ratio nanostructure and superior current-carrying capacity to Cu and W, as well as other potential candidates. Based on the results for 40 nm and 60 nm top-contact metallized CNT vias, we demonstrate that not only are their current-carrying capacities two orders of magnitude higher than their Cu and W counterparts, they are enhanced by reduced via resistance due to contact engineering facilitated by the first reported contact resistance extraction scheme for a 40 nm linewidth.

Synthesis and interface characterization of CNTs on graphene

“…The growth recipe is slightly different from the first set as we used C 2 H 2 as the carbon source and a lower temperature of 700 °C. The growth process is similar to that for CNT vias [16,21].…”

“…Carbon nanomaterials, with their promise of near-ballistic transport [10] and large currentcarrying capacities, have been demonstrated as both horizontal interconnects (lines) [6,11,12] and vertical interconnects (vias) [13][14][15][16][17]. Both two-dimensional graphene and one-dimensional CNTs have been shown to exhibit currentcarrying capacities which are orders of magnitude higher than that of copper [18][19][20][21]. Graphene would be an ideal candidate for horizontal interconnects due to its 2D geometry.…”

“…Moreover, identifying and assessing suitable vertical via materials to be integrated with horizontal graphene interconnects is needed and requires in-depth studies of fabrication, interface analysis, and electrical characterization of the 3D test structure. On the other hand, vertically aligned CNTs have been readily obtained using various chemical vapor deposition (CVD) methods [22,23], and CNT interconnect vias with widths down to 40 nm have been systematically studied [16,21]. However, the CNT vias reported were grown on a metal underlayer, giving rise to significant contact resistance [13][14][15][16][17].…”

Carbon Nanotube-on-Graphene Heterostructures

“…1 Carbon nanomaterials such as graphene and carbon nanotube (CNT), on the other hand, possess current-carrying capacities at least two orders of magnitude higher than that of Cu. [6][7][8][9] Thus, they have been proposed as materials for horizontal interconnects [10][11][12] as well as vertical vias. [13][14][15][16][17] Work on the characterization of graphene as a horizontal interconnect has been reported, 10,12 but the authors did not address how graphene would fit into an overall on-chip interconnect network.…”

“…[13][14][15][16][17] Work on the characterization of graphene as a horizontal interconnect has been reported, 10,12 but the authors did not address how graphene would fit into an overall on-chip interconnect network. On the other hand, although studies have been carried out on CNT vias down to sub-100 nm dimensions, 9,16,18 the resistance of the CNT vias is still much higher than those of Cu interconnects with similar dimensions. This high resistance is primarily due to the significant contact resistance between the CNTs and the metal underlayer.…”