2006
DOI: 10.1134/s1063782606080100
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Effect of fast annealing on the electrical properties of SiO2/Si structures with thin layers of anodic silicon oxide

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Cited by 2 publications
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“…This complexity in the VLSI circuit gives rise to RC delay, which is a great hindrance in the speed performance of the devices. Intensive research is going on to reduce delay by realizing lower dielectric constant material (k ~ 2-3⋅5) (Kal et al 1995;Ma et al 1998;Morgen et al 2000;Maex et al 2003;Baranov et al 2006;Wang et al 2006;Joshi and Mahajan 2008) for interlayer dielectric instead of conventional SiO 2 used in microelectronics (Vexler et al 2006). According to the International Technology Roadmap for Semiconductors (ITRS) (www.itrs.net 2007), it is required to integrate dielectric materials with effective k values between 2⋅3 and 2⋅6, so the problem of cross-talk and power dissipation can be minimized to a large extent.…”
Section: Introductionmentioning
confidence: 99%
“…This complexity in the VLSI circuit gives rise to RC delay, which is a great hindrance in the speed performance of the devices. Intensive research is going on to reduce delay by realizing lower dielectric constant material (k ~ 2-3⋅5) (Kal et al 1995;Ma et al 1998;Morgen et al 2000;Maex et al 2003;Baranov et al 2006;Wang et al 2006;Joshi and Mahajan 2008) for interlayer dielectric instead of conventional SiO 2 used in microelectronics (Vexler et al 2006). According to the International Technology Roadmap for Semiconductors (ITRS) (www.itrs.net 2007), it is required to integrate dielectric materials with effective k values between 2⋅3 and 2⋅6, so the problem of cross-talk and power dissipation can be minimized to a large extent.…”
Section: Introductionmentioning
confidence: 99%