Edge Terminations for 4H-SiC Power Devices: A Critical Issue

Abstract

Edge termination is a critical part of a power devices. Numerous edge termination types have been developed for silicon devices. Implementation of these termination architectures are not straightforward in SiC due to physical and processing specificities: lower junction depths, higher electric field, trench depth and shaping limitations, etc. Two main families of terminations are currently used in commercial devices, pure Field Guard Rings, and JTE + Rings combination. The increasing number of trench commercial devices requires new approaches based on etched rings filled with dielectrics or polysilicon. For epitaxied bipolar devices, MESA with bevel angle termination combined with JTE based architecture are also suitable. In any case, and especially regarding avalanche capability requirements, not only the termination architecture is relevant, but also the passivation type, the channel stopper design, the 3D design. As modelling using conventional tools is not fully reliable, specific complementary characterization methods are needed. For instance, micro-OBIC can be very effective to determine the electric field distribution in the periphery of the power devices.

Carrier Trap Density Reduction at SiO2/4H-Silicon Carbide Interface with Annealing Processes in Phosphoryl Chloride and Nitride Oxide Atmospheres

“…Consequently, a low ON-resistance of the MOSFET can be attained, which is desirable in power transistors. Both applications require high dielectric strength and low leakage current at high electric fields [ 37 ]. The present investigations show that, despite previous concerns about the application of POCl 3 annealing and oxidation processes, it is possible to realize dielectrics with very low trap state density and high critical fields by using proper technological treatment and a combination of POCl 3 and NO annealing processes.…”

Emerging trends in OBIC characterization technique for Wide Bandgap semiconductor devices

“…In the near future, advanced power grids and High Voltage Direct Current (HVDC) transmission systems will increasingly rely on ultrahigh voltage devices (>10 kV) [4][5] [6]. In order to fully leverage the benefits of wide-bandgap semiconductor materials and prevent premature breakdown of these high voltage devices, it is crucial to have effective peripheral protections [7][8] [9]. This paper aims to demonstrate how the OBIC technique can be utilized to assess the efficiency of peripheral protection by analyzing the distribution of the electric field within the device structure, particularly at the junction periphery.…”