Dynamic Reconfiguration of 3D Photonic Networks-on-Chip for Maximizing Performance and Improving Fault Tolerance

Morris, Randy; Kodi, Avinash; Louri, Ahmed

doi:10.1109/micro.2012.34

Cited by 41 publications

(20 citation statements)

References 29 publications

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“…Hybrid NoCs are more likely to be adopted in near future than all-optical NoCs because of the currently large static power overheads of optical interconnects. A large number of interesting hybrid optical NoCs has been proposed in recent literature [45,46,47,17,22,48,49,50,51,52,31,10,16,15]. Phastlane [47] combines a packetswitched mesh network with an optical, contention-free crossbar to transmit cache lines over several hops in one cycle.…”

Section: Related Workmentioning

confidence: 99%

“…The number of wavelengths required in the NoC equals the number of nodes in the topology. R-3PO [31] is a 3D NoC utilizing an optical crossbar with a token-based control network to handle accesses. Just like WRONoCs, optical crossbars have limited scalability as the number of microrings, and thus ring heater power, increases rapidly for larger network sizes.…”

Section: Related Workmentioning

confidence: 99%

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Designing Low-Power, Low-Latency Networks-on-Chip by Optimally Combining Electrical and Optical Links

Werner¹,

Navaridas²,

Luján³

2017

2017 IEEE International Symposium on High Performance Computer Architecture (HPCA)

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Optical on-chip communication is considered a promising candidate to overcome latency and energy bottlenecks of electrical interconnects. Although recently proposed hybrid Networks-on-chip (NoCs), which implement both electrical and optical links, improve power efficiency, they often fail to combine these two interconnect technologies efficiently and suffer from considerable laser power overheads caused by high-bandwidth optical links. We argue that these overheads can be avoided by inserting a higher quantity of low-bandwidth optical links in a topology, as this yields lower optical loss and in turn laser power. Moreover, when optimally combined with electrical links for short distances, this can be done without trading off latency. We present the effectiveness of this concept with Lego, our hybrid, mesh-based NoC that provides high power efficiency by utilizing electrical links for local traffic, and low-bandwidth optical links for long distances. Electrical links are placed systematically to outweigh the serialization delay introduced by the optical links, simplify router microarchitecture, and allow to save optical resources. Our routing algorithm always chooses the link that offers the lowest latency and energy. Compared to state-of-the-art proposals, Lego increases throughputper-watt by at least 40%, and lowers latency by 35% on average for synthetic traffic. On SPLASH-2/PARSEC workloads, Lego improves power efficiency by at least 37% (up to 3.5×).

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Section: Related Workmentioning

confidence: 99%

Section: Related Workmentioning

confidence: 99%

Designing Low-Power, Low-Latency Networks-on-Chip by Optimally Combining Electrical and Optical Links

Werner¹,

Navaridas²,

Luján³

2017

2017 IEEE International Symposium on High Performance Computer Architecture (HPCA)

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“…R-3PO [17] is also crossbar-based, deploying a Multi-Write-Single-Read (MWSR) bus. Using crossbar-like networks have a simpler design than those using switches, but require a high number of microrings when the network size increases.…”

Section: Related Workmentioning

confidence: 99%

Amon: An Advanced Mesh-like Optical NoC

Werner

Navaridas

Luján

2015

2015 IEEE 23rd Annual Symposium on High-Performance Interconnects

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Abstract-Optical Networks-on-chip constitute a promising approach to tackle the power wall problem present in largescale electrical NoC design. In order to enable their adoption and ensure scalability, oNoCs have to be carefully designed with power and energy consumption in mind. In this paper, we propose Amon, an all-optical NoC design based on passive microrings and Wavelength Division Multiplexing, including the switch architecture and a contention-free routing algorithm. The goal is to obtain a design that minimizes the total number of wavelengths and microrings, the wiring complexity and the diameter. An analytical comparison with state-of-the-art design proposals of all-optical NoCs shows that the proposed design can substantially improve the most important performance metrics: hop counts, chip area, energy and power consumption. Our experimental work confirms that this improvement translates into higher performance and efficiency. Finally, our design provides a tile-based structure which should facilitate VLSI integration when compared with recent ring-like solutions. In general we show it provides a more scalable solution than previous designs.

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“…The paper has following contributions:-(1) A novel WDM compatible MDM based 2-layer PNoC architecture has been proposed which is first of its kind, (2) A novel laser multiplexing scheme was introduced and (3) The proposed design was evaluated using circuit level simulator and the following results were reported: (a) 40-Gbps aggregate bandwidth which is 4× higher than the recently reported result[11], (b) power consumption of 2.4fW/bit per optical path which is 50% less than the best reported result [7], (c) -2dB insertion loss for the longest optical path which is 75% less than the recently reported result [10].…”

Section: Introductionmentioning

confidence: 97%

“…Several 2D Photonic NoC architecture based on mesh [2], torus [1], crossbar [4] and clos [5] topologies have been proposed in recent years. To decrease the cross sectional area and cross over points several 3D topologies have also been proposed [7] [10]. In this paper we have considered nano-photonic interconects involving WDM in conjunction with mode division multiplexing (MDM) to design PNoC [3].…”

Section: Introductionmentioning

confidence: 99%

A 2-layer laser multiplexed photonic network-on-chip

Dang

Patra

Mahapatra

2015

Sixteenth International Symposium on Quality Electronic Design

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In Recent times many two-dimensional photonic NoC architectures have been proposed with laser sources. Such Photonic NoCs meet high-bandwidth requirements but at the cost of significant power consumptions. In this paper, we propose a low-power and low cost solution to photonic NoC. A 2-layer photonic NoC architecture with laser multiplexing has been designed using a separate ring waveguide layer towards realizing a 3D photonic NoC. This approach is first of its kind in designing high-performance and low-power Photonic NoC architecture. The design approach is scalable. The proposed design results in 75% reduction in the number of on-chip lasers and 50% reduction in power dissipation compared to recently reported results.

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Dynamic Reconfiguration of 3D Photonic Networks-on-Chip for Maximizing Performance and Improving Fault Tolerance

Cited by 41 publications

References 29 publications

Designing Low-Power, Low-Latency Networks-on-Chip by Optimally Combining Electrical and Optical Links

Designing Low-Power, Low-Latency Networks-on-Chip by Optimally Combining Electrical and Optical Links

Amon: An Advanced Mesh-like Optical NoC

A 2-layer laser multiplexed photonic network-on-chip

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