2015 International Symposium on Rapid System Prototyping (RSP) 2015
DOI: 10.1109/rsp.2015.7416548
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Dynamic data flow analysis for NoC based application synthesis

Abstract: Network-on-Chip (NoC) is an interesting communication fabric for multi processing element architectures that benefits from the parallelism of algorithms. We present a method that uses a symbolic execution technique to extract the parallelism of an application to be mapped on FPGAs using the flexibility of a NoC communication infrastructure and the properties of a high level programming language. An application specific hardware is then generated using a High Level Synthesis flow. We provide a dedicated mechani… Show more

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Cited by 1 publication
(4 citation statements)
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“…Kapadia et al [34] also proposed a 3-D NoC-PDN cosynthesis framework to minimize communication power in a regular NoC while also reducing worst-case IR-drops in the power delivery network (PDN). Other efforts focus on application specific synthesis of irregular NoCs [35][36][37][38][39][40]. For example, Murali et al [35] present a synthesis technique that utilizes min-cut partitioning to allocate switches to groups of custom cores and minimize NoC power consumption.…”
Section: Noc Synthesis Approachesmentioning
confidence: 99%
See 3 more Smart Citations
“…Kapadia et al [34] also proposed a 3-D NoC-PDN cosynthesis framework to minimize communication power in a regular NoC while also reducing worst-case IR-drops in the power delivery network (PDN). Other efforts focus on application specific synthesis of irregular NoCs [35][36][37][38][39][40]. For example, Murali et al [35] present a synthesis technique that utilizes min-cut partitioning to allocate switches to groups of custom cores and minimize NoC power consumption.…”
Section: Noc Synthesis Approachesmentioning
confidence: 99%
“…Srinivasan et al [36] present a genetic algorithm based approach to synthesize a low power custom NoC topology. Payet et al [39] present a dynamic approach to data dependency profiling and its associated synthesis chain to generate NoCs. Romanov et al [40] propose using irregular topologies for the synthesis of NoCs based on task graph analysis.…”
Section: Noc Synthesis Approachesmentioning
confidence: 99%
See 2 more Smart Citations