Dual-Purpose Mixed-Level Test Generation Using Swarm Intelligence

Gent, Kelson; Hsiao, Michael S.

doi:10.1109/ats.2014.50

Cited by 6 publications

(2 citation statements)

References 22 publications

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“…We demonstrate the value of the method on couple of fault models, non-scan transition and non-scan stuck at, as well as provide the level of branch coverage achieved by the metric. The non-scan stuck-at fault coverage is compared to the mixed-level generation in [12] and a high level test generation tool, HTest [5]. The characteristics of the benchmarks are shown in Table V. TABLE V BENCHMARK CHARACTERISTICS Benchmark Lines PIs POs FFs Logic Gates b10 210 12 6 17 155 b11 131 8 6 30 353 b12 614 6 6 121 987 b13 361 11 10 53 289 b14 1030 33 54 247 3375 b15 750 36 70 447 6826 or1200 14695 164 207 2234 31144…”

Section: Resultsmentioning

confidence: 99%

“…However, all these methods utilize macro level code coverage metrics, such as branch coverage, which do not adequately represent lower level behavior within the design. To combat this, mixed level generation is used in [10][11][12], these methods generate vectors at the RTL and then refine the generation process using information from gate level simulation or test generation. However, the invocation of gate-level fault simulation significantly slows these methods and the full benefit of generation at the RTL is not realized.…”

Section: Introductionmentioning

confidence: 99%

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Fast Multi-level Test Generation at the RTL

Gent

Hsiao

2016

2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)

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Abstract-Functional, at-speed vectors continue to provide added value to the testing community as circuit complexity rises. Complex defects may escape traditional scan vectors and thus often require at-speed patterns. However, generation of functional/sequential vectors is an extremely challenging problem. Previous methods rely on formal models of the RTL or calls to gate level ATPG, both of which are computationally expensive, limiting the efficacy of gains made in RTL stimuli generation. In this work, we present an efficient engine for the generation of high quality functional tests at the RTL which are effective for both validation and at-speed defect detection. The proposed method utilizes a rule based, behavioral coverage metric to accurately assess the activation of circuit modules by the generated stimuli. Based on this metric, we are able to effectively generate functional test vectors at the RTL, without additional gate level information, that can achieve a high level of defect coverage and up to an order of magnitude speedup over existing techniques.

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Section: Resultsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%