Dual-Calibration Technique for Improving Static Linearity of Thermometer DACs for I/O

Mukhopadhyay, I.; Mukadam, Mustansir; Narayanan, Rajendran; O'Mahony, Frank; Apsel, Alyssa

doi:10.1109/tvlsi.2015.2424954

Cited by 8 publications

(2 citation statements)

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“…For the design of DAC, various switches like NMOS, PMOS and transmission gate are explored. Characteristics of switching elements are one of the prominent factors for dynamic non linearity of DAC [8,9].…”

Section: Introductionmentioning

confidence: 99%

“…Though this architecture occupies lesser digital area and power, but suffers from glitches specifically when have more numbers of transitions in input. The authors have calculated INL, DNL of 4-bit Binary Current Steering DAC having various type of switches: NMOS, PMOS and transmission gate [9,12]. DAC are evaluated based on the various parameters like Resolution, poer concumption, setteling time, dynamic range, non-linearity error (INLand DNL).…”

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confidence: 99%

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Design and implementation of 4 bit binary weighted current steering DAC

Patel

Naik

2020

IJECE

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A compact current-mode Digital-to-Analog converter (DAC) suitable for biomedical application is repesented in this paper .The designed DAC is binary weighted in 180nm CMOS technology with 1.8V supply voltage. In this implementation, authors have focused on calculaton of Non linearity error say INL and DNL for 4 bit DAC having various type of switches: NMOS, PMOS and Transmission Gate. The implemented DAC uses lower area and power compared to unary architecture due to absence of digital decoders. The desired value of Integrated non linearity (INL) and Differential non linearity (DNL) for DAC for are within a range of +0.5LSB. Result obtained in this works for INL and DNL for the case DAC using Transmission Gate is +0.34LSB and +0.38 LSB respectively with 22mW power dissipation.

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Section: Introductionmentioning

confidence: 99%

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confidence: 99%