Dry etch sequencing induced gate oxide degradation due to metallic contamination in 0.25 μm CMOS manufacturing

Hughes, J.B.; Perera, A.H.; Hernandez, I.; Parihar, Sanjay; Karupanna, K.; Vasek, Jim; Hanna, John V.; Nagy, A.; Lii, T.; Reese, Michael; Rose, Jonathan; Arnold, John; Cain, James P.; Mattay, S.; Porter, Jared M.; Razumovsky, O.; Chesnut, T.; Kaiser, Anne M.; Poon, S.

doi:10.1109/iedm.1998.746368

Cited by 1 publication

(2 citation statements)

References 0 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…These results differ from other published results where large Co concentrations Ͼ10 12 cm Ϫ3 introduced on the Si wafer surface before oxide growth yielded significant gate oxide leakage current. 1 These new results suggest that any accidental Co contamination introduced during device processing after field and gate oxidation does not present a large risk of oxide degradation that similar contamination prior to oxide growth has exhibited.…”

Section: Co Migration During Furnace Annealingmentioning

confidence: 87%

“…In this case, the Co diffused through the polysilicon and into the gate oxide resulting in excess leakage, reduced circuit yield, and reduced reliability of circuits. 1 High concentrations of intentionally introduced Co on Si before oxide growth has been shown to degrade both oxide and substrate properties. 2,3 Cu surface contamination has been shown to effect oxide, accelerating the growth.…”

mentioning

confidence: 99%

See 1 more Smart Citation

Electrical Properties of Cobalt and Copper Contamination in Processed Silicon

Benton¹,

Boone²,

Jacobson³

et al. 2001

J. Electrochem. Soc.

View full text Add to dashboard Cite

The issue of detection and migration of metal contamination during Si wafer processing is crucial for the perfection of 0.18 m manufacturing technology. In these experiments, both Co and Cu were intentionally introduced into Si wafers by two methods: either 1 MeV or 60 keV ion implantation at doses of 1 ϫ 10 11 cm Ϫ2 to 1 ϫ 10 13 cm Ϫ2 , or by dipping into a standard Co solution. Quantox, secondary ion mass spectroscopy, total X-ray fluorescence, and deep level transient spectroscopy were used to analyze metal migration during furnace heat-treatments. Both Co and Cu diffused from the back of the wafers to kill carrier recombination lifetime throughout the bulk Si. p/p ϩ epitaxial gettered the Co, so near-surface lifetime remained high even after contamination. Co diffused through 40, 100, or 1000 Å SiO 2 into the bulk of Si. However, there was no evidence of Co migration from the surface of wafers to adjoining wafers during furnace anneal, 900°C, 30 min. Measurements of charge-to-breakdown, Q bd , on fabricated metal oxide semiconductor poly-dots before and after Cu and Co back-side implant and annealing at either 650 or 1000°C, 30 min, showed no changes attributed to metals within the 100 Å oxides. In addition, metal contamination, introduced either by implantation into the Si or by deposition on the oxide at these levels, did not effect interface state density, D it , or oxide tunneling voltages.The silicon microelectronics industry is currently including the transition metals copper and cobalt in back-end processing of integrated circuits, thus presenting the possibility of metal contamination during front-end manufacturing. It becomes critically important, therefore, to develop a monitoring protocol for measuring trace amounts of Co and Cu introduced into the Si substrates by processing tools. It also becomes equally important to determine the effect of Co and Cu on the electrical properties of processed Si. Recent reports indicated that an etching tool, used for both hard mask etch and contact etch after CoSi 2 formation, deposited Co contamination on wafers. In this case, the Co diffused through the polysilicon and into the gate oxide resulting in excess leakage, reduced circuit yield, and reduced reliability of circuits. 1 High concentrations of intentionally introduced Co on Si before oxide growth has been shown to degrade both oxide and substrate properties. 2,3 Cu surface contamination has been shown to effect oxide, accelerating the growth. 4 The effect of Co and Cu contamination occurring after gate oxide growth, such as during back-end processing, has not been established and is a crucial concern to process integration engineers. Copper in Si forms Cu-Cu pairs if the quench from high temperatures is fast enough 5,6 and these point defect pairs reduce the minority carrier lifetime of the Si. 7 However, almost nothing is known about the electrical activity of cobalt or copper precipitates 8 and what effect incorporated silicide precipitates have on carrier lifetime in Si. Because of the high mobility o...

show abstract

Section: Co Migration During Furnace Annealingmentioning

confidence: 87%

mentioning

confidence: 99%