Droop Method for High-Capacity Parallel Inverters in Islanded Mode Using Virtual Inductor

A Droop Method for High Capacity Parallel Inverters Considering Accurate Real Power Sharing

“…Hence, it makes the voltage drop at the virtual inductance larger than the nominal voltage which causes an output power reduction due to the reference voltage reduction caused by the big virtual impedance voltage drop. Therefore, by using (10) and (11), it can be improved to achieve zero reactive power sharing error and the high performance of real power sharing. Additionally, when line impedances are predominantly resistive, the resistive droop equation can be considered as Fig.…”

“…With the conventional resistive droop, the opposite of reactive power sharing is correct but a real power sharing error occurs due to the unbalanced line impedance. As a result, the resistive droop equation is proposed as (12) as in (11).…”

“…However, if the line impedances are high enough because of the long distance between the DG and the PCC or if the capacity of that system is large and the output current is very large, then it results in a high virtual inductor voltage drop which causes a reduction of the output voltage and power [11]. Note that the virtual impedance voltage drop is obtained through the multiplication of both the virtual impedance value and the output current [12].…”