DRC Hotspot Prediction at Sub-10nm Process Nodes Using Customized Convolutional Network

Liang, Rongjian; Xiang, Hua; Pandey, Diwesh; Reddy, L. J.; Ramji, Shyam; Nam, Gi-Joon; Hu, Jiang

doi:10.1145/3372780.3375560

Cited by 56 publications

(19 citation statements)

References 15 publications

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“…Several works explored ML models to prevent routing violations [37,5,32,34,35,38,11,27,36,18] using different strategies. In [37] and [5] circuit layout features such as pin distribution and density parameters are extracted to train non-convolutional models.…”

Section: Machine Learning In Physical Design Applicationsmentioning

confidence: 99%

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Algorithm Selection Framework for Legalization Using Deep Convolutional Neural Networks and Transfer Learning

Netto

Fabre

Fontana

et al. 2022

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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Machine learning models have been used to improve the quality of different physical design steps, such as timing analysis, clock tree synthesis and routing. However, so far very few works have addressed the problem of algorithm selection during physical design, which can drastically reduce the computational effort of some steps. This work proposes a legalization algorithm selection framework using deep convolutional neural networks. To extract features, we used snapshots of circuit placements and used transfer learning to train the models using pre-trained weights of the Squeezenet architecture. By doing so we can greatly reduce the training time and required data even though the pre-trained weights come from a different problem. We performed extensive experimental analysis of machine learning models, providing details on how we chose the parameters of our model, such as convolutional neural network architecture, learning rate and number of epochs. We evaluated the proposed framework by training a model to select between different legalization algorithms according to cell displacement and wirelength variation. The trained models achieved an average F-score of 0.98 when predicting cell displacement and 0.83 when predicting wirelength variation. When integrated into the physical design flow, the cell displacement model achieved the best results on 15 out of 16 designs, while the wirelength variation model achieved that for 10 out of 16 designs, being better than any individual legalization algorithm. Finally, using the proposed machine learning model for algorithm selection resulted in a speedup of up to 10x compared to running all the algorithms separately.

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Section: Machine Learning In Physical Design Applicationsmentioning

confidence: 99%

“…In [35,36], a model that identifies pin patterns that would likely lead to violations is trained. In [38] and [27], circuit placement is used to generate violation hotspot maps. In [11], a reinforcement learning approach is developed.…”

Section: Machine Learning In Physical Design Applicationsmentioning

confidence: 99%

Algorithm Selection Framework for Legalization Using Deep Convolutional Neural Networks and Transfer Learning

Netto

Fabre

Fontana

et al. 2022

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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show abstract

“…After that, each pin-to-pin routing problem is solved by classical heuristic-based router such as rip-up and reroute [19], force-directed routing [20] and region-wise routing. Recently, machine learning techniques have been applied for routing information prediction, including routing congestion [21], the routability of a given placement [22] and circuit performance [23]. Meanwhile, RL method has also been proposed to handle routing problems.…”

Section: Related Workmentioning

confidence: 99%

On Joint Learning for Solving Placement and Routing in Chip Design

Chen

Yan

2021

Preprint

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For its advantage in GPU acceleration and less dependency on human experts, machine learning has been an emerging tool for solving the placement and routing problems, as two critical steps in modern chip design flow. Being still in its early stage, there are fundamental issues: scalability, reward design, and end-toend learning paradigm etc. To achieve end-to-end placement learning, we first propose a joint learning method termed by DeepPlace for the placement of macros and standard cells, by the integration of reinforcement learning with a gradient based optimization scheme. To further bridge the placement with the subsequent routing task, we also develop a joint learning approach via reinforcement learning to fulfill both macro placement and routing, which is called DeepPR. One key design in our (reinforcement) learning paradigm involves a multi-view embedding model to encode both global graph level and local node level information of the input macros. Moreover, the random network distillation is devised to encourage exploration. Experiments on public chip design benchmarks show that our method can effectively learn from experience and also provides intermediate placement for the post standard cell placement, within few hours for training.

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“…The placement and routing are strongly coupled. Thus it is crucial to consider the routing performance even in the placement stage, and many ML-based routing-aware methods are proposed to improve the performance of physical design [6,27,88,103,147,151].…”

Section: Introductionmentioning

confidence: 99%

Machine Learning for Electronic Design Automation: A Survey

Huang

et al. 2021

Preprint

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With the down-scaling of CMOS technology, the design complexity of very large-scale integrated (VLSI) is increasing. Although the application of machine learning (ML) techniques in electronic design automation (EDA) can trace its history back to the 90s, the recent breakthrough of ML and the increasing complexity of EDA tasks have aroused more interests in incorporating ML to solve EDA tasks. In this paper, we present a comprehensive review of existing ML for EDA studies, organized following the EDA hierarchy.

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DRC Hotspot Prediction at Sub-10nm Process Nodes Using Customized Convolutional Network

Cited by 56 publications

References 15 publications

Algorithm Selection Framework for Legalization Using Deep Convolutional Neural Networks and Transfer Learning

Algorithm Selection Framework for Legalization Using Deep Convolutional Neural Networks and Transfer Learning

On Joint Learning for Solving Placement and Routing in Chip Design

Machine Learning for Electronic Design Automation: A Survey

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