2019
DOI: 10.1007/978-3-030-24258-9_21
|View full text |Cite
|
Sign up to set email alerts
|

DRAT-based Bit-Vector Proofs in CVC4

Abstract: Many state-of-the-art Satisfiability Modulo Theories (SMT) solvers for the theory of fixed-size bit-vectors employ an approach called bit-blasting, where a given formula is translated into a Boolean satisfiability (SAT) problem and delegated to a SAT solver. Consequently, producing bit-vector proofs in an SMT solver requires incorporating SAT proofs into its proof infrastructure. In this paper, we describe three approaches for integrating DRAT proofs generated by an off-the-shelf SAT solver into the proof infr… Show more

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
1

Citation Types

0
1
0

Year Published

2021
2021
2022
2022

Publication Types

Select...
2
1

Relationship

0
3

Authors

Journals

citations
Cited by 3 publications
(1 citation statement)
references
References 14 publications
0
1
0
Order By: Relevance
“…Such certificates demonstrate that the SMT QF BV query is reduced to a Boolean SAT query correctly and the corresponding SAT query is solved correctly. Although one can certify SAT query results with certificates from SAT solvers [24], it is not always easy to certify correct bit blasting due to complex arithmetic operations in SMT QF BV queries. Developing correct and efficient checkers for SMT QF BV certificates can be very challenging.…”
Section: Introductionmentioning
confidence: 99%
“…Such certificates demonstrate that the SMT QF BV query is reduced to a Boolean SAT query correctly and the corresponding SAT query is solved correctly. Although one can certify SAT query results with certificates from SAT solvers [24], it is not always easy to certify correct bit blasting due to complex arithmetic operations in SMT QF BV queries. Developing correct and efficient checkers for SMT QF BV certificates can be very challenging.…”
Section: Introductionmentioning
confidence: 99%