2018
DOI: 10.3390/ma11040559
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Drain Current Stress-Induced Instability in Amorphous InGaZnO Thin-Film Transistors with Different Active Layer Thicknesses

Abstract: In this study, the initial electrical properties, positive gate bias stress (PBS), and drain current stress (DCS)-induced instabilities of amorphous indium gallium zinc oxide (a-IGZO) thin-film transistors (TFTs) with various active layer thicknesses (TIGZO) are investigated. As the TIGZO increased, the turn-on voltage (Von) decreased, while the subthreshold swing slightly increased. Furthermore, the mobility of over 13 cm2·V−1·s−1 and the negligible hysteresis of ~0.5 V are obtained in all of the a-IGZO TFTs,… Show more

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Cited by 14 publications
(14 citation statements)
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“…Compared to a previous publication [25], the electrical properties of a-IGZO TFTs with various T IGZO exhibit the identical tendency. It is suggested that the devices exhibit great repeatability for the same kind of material under the same fabrication process.…”
Section: Resultsmentioning
confidence: 60%
“…Compared to a previous publication [25], the electrical properties of a-IGZO TFTs with various T IGZO exhibit the identical tendency. It is suggested that the devices exhibit great repeatability for the same kind of material under the same fabrication process.…”
Section: Resultsmentioning
confidence: 60%
“…The transfer curves of TFT devices with different T ITZO were evaluated at a drain voltage (V DS ) of 0.1 and 20.1 V, as shown in Figure 2. The linear (µ lin ) and saturated (µ sat ) mobilities were estimated on the basis of previous literature [21]. The turn-on voltage (V ON ) was extracted from the gate voltage (V GS ) at a drain current (I DS ) of 1 nA.…”
Section: Resultsmentioning
confidence: 99%
“…When the stress time exceeds 3000 s, hole trapping seems to become a major reason for the slightly negative V ON shift. It can be explained by the impact ionization phenomenon [21], which induces the generation of an electron-hole pair. Consequently, the excited charges are trapped at the front-and back-channel interfaces.…”
Section: Discussionmentioning
confidence: 99%
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“…In existing reports, under conditions that enable increasing of the driving current, such as an increase in the environment temperature and an examination of light during the stress evaluation, it is common to see that a hump is manifested. In addition, in recent research carried out on the abnormal drive of a transistor by the drain current stress 20,21 , a hump phenomenon has been reported. Although there have been reports on the hump effect under the subthreshold operation as an edge effect back-channel conduction or parasitic TFTs, the hump effect has not been fully studied in oxide semiconductors under various driving stress environments.…”
Section: Introductionmentioning
confidence: 99%