Drafting in Self-Timed Circuits

Abstract

Intervals between data items propagating in self-timed circuits are controlled by handshake signals rather than by a clock. In many self-timed designs, a trailing data item will catch up with a leading item or token, even when it trails by thousands of gate delays. This effect, called "drafting," can be seen in many of the self-timed designs, e.g., GasP, Mousetrap, Click, and Micropipeline. The purpose of this dissertation is to reveal the circuit mechanism of drafting in self-timed circuits typically used in FIFO stages.Drafting is usually considered to be incidental to the operation of self-timed circuits since interval timing information is irrelevant to preservation of the proper order of data.However, if new applications of self-timed designs require preservation of timing between data items, or if interval data carries information, then the drafting mechanism must be understood to control it. Since drafting is an analog function in a digital circuit the effect may be used as a source of randomness or uniqueness. The drafting effect changes with manufacturing variability and each unit may provide a source for a unique digital signature that can be used in security applications.ii