Double-sided TOPCon solar cells on textured wafer with ALD SiOx layer

Lozac’h, Mickaël; Nunomura, Shota; Matsubara, Koji

doi:10.1016/j.solmat.2019.110357

Cited by 42 publications

(22 citation statements)

References 38 publications

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“…The double-sided TOPCon solar cells present a very high J sc over 39 mA/cm 2 ( Figure 2) for such structure with a front shadowing grid. 36 The textured surface provides a clear benefit in term of shortcircuit current J sc compared with the polished surfaces (Figure 2A) about 4.7 mA/cm 2 for a SiO x thickness of 2c ALD. The EQE analysis underlines an enhanced absorption from 600 to 1200 nm for textured surface over polished surfaces ( Figure 2C).…”

Section: Short Circuit Current and External Quantum Efficiencymentioning

confidence: 91%

“…After high T annealing, the structure becomes (p) poly-Si (22 ± 1 nm)/ SiO x /c-Si/SiO x /(n) poly-Si (22 ± 1 nm) ( Figure 1), where the (p) a-Si:H/ (i) a-Si:H stack is used as a precursor of the front (p) poly a-Si:H layer to control the boron diffusion through the ultrathin SiO x layer. 36 Hereafter, we denote the (p) and (n) poly-Si/SiO x stacks as (p) and (n) stacks, respectively. The (p) stack is about 22 nm to avoid severe ITO sputtering damage.…”

Section: Solar Cell Structuresmentioning

confidence: 99%

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Role of silicon surface, polished 〈100〉 and 〈111〉 or textured, on the efficiency of double‐sided TOPCon solar cells

Lozac’h

Nunomura

2020

Progress in Photovoltaics

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We investigate the role of the silicon surface and orientation on double‐sided TOPCon solar cells properties. The solar cells of front and rear, (p) and (n), poly‐Si/SiOx stack, fabricated on polished surfaces oriented 〈100〉 and 〈111〉 and pyramid textured surfaces, are characterized as a function of the thickness of an ultrathin SiOx layer, controlled at atomic scale from one‐ to four‐cycle atomic layer deposition (ALD). Our findings underline that the optimized thickness of the ultrathin SiOx is about 1.1 ± 0.1 nm, corresponding to a two‐cycle ALD, regardless of the surface and orientation of the c‐Si substrate. The open‐circuit voltage is about 10 mV higher on the polished 〈100〉‐oriented surface, associated with lower defect density at the interface of SiOx/c‐Si. On the other hand, the contact resistance is much lower, about 0.45 Ω/cm2, on the polished 〈111〉‐oriented surface. On textured surfaces, we demonstrate a photoconversion efficiency of 19.1% for the double‐sided TOPCon structure strictly for a SiOx thickness with two‐cycle ALD, which underlines the importance of the ALD technique for the precise control of the ultrathin SiOx thickness on textured surface.

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Section: Short Circuit Current and External Quantum Efficiencymentioning

confidence: 91%

Section: Solar Cell Structuresmentioning

confidence: 99%

Role of silicon surface, polished 〈100〉 and 〈111〉 or textured, on the efficiency of double‐sided TOPCon solar cells

Lozac’h

Nunomura

2020

Progress in Photovoltaics

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“…These approaches all have a major challenge in common. The <111> crystal orientation, the pyramidal surface texture that is the standard for industry, and the scientific community is crucial for light management but incompatible with the crystalline phase in the nano/poly‐si, perovskite, and C(I)GS materials 9‐11 . Not only is conformal growth challenging on the sharp pyramidal features, the crystalline phase tends to form cracks, 12 or low‐density defective regions 13,14 .…”

Section: Introductionmentioning

confidence: 99%

Advanced textured monocrystalline silicon substrates with high optical scattering yields and low electrical recombination losses for supporting crack‐free nano‐ to poly‐crystalline film growth

Vrijer

Smets

2021

Energy Science & Engineering

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Crystalline silicon tandem devices with perovskites, CIGS, and nanocrystalline silicon, as well as the TOPCon design, are incompatible with the conventional pyramidal surface texture of silicon. This is a result of crack formation in nano to polycrystalline growth on large sharp surface features. In this work, three texturing approaches are investigated, using alkaline and/or acidic wet chemical etches, that can lead to the crack‐free growth of nano to polycrystalline materials on textured surfaces. In this work, we show that without acidic smoothening, the fraction of <111> pyramidal surface coverage has to remain relatively small to prevent crack formation during crystalline growth on these surfaces. Applying an acidic etch as a function of time continuously smoothens surface features. This shifts the reflection to wider scattering angles and results in higher total reflected intensity with respect to the conventional texture, making it an interesting option for a wide variety of tandem pv applications. Finally, we demonstrate crater‐like features on a <100> monocrystalline silicon surface using an etching process including a sacrificial layer. These craters increase light scattering into wider angles, but to a lesser extent than the former approach. In terms of passivation, we demonstrate the positive effect of a post deposition hydrogen treatment. Initial dilution of the silane plasma improves passivation on a <111> surface, but is detrimental to passivation on a <100> surface, likely because the hydrogen dilution results in epitaxial growth at the c‐Si/a‐Si:H hetero‐interface. A minority carrier lifetime of over 3 ms has been achieved for all texturing approaches, after deposition of a 15 nm a‐Si:H layer on both sides of the wafer, for different a‐Si:H deposition and annealing schemes.

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“…[ 23,24 ] Preparation of high‐performance TOPCon on the front textured surface of p ‐type substrate has significant academic and industrial value for further development of high‐efficient c‐Si PERC solar cells, since so far, conversion efficiency for such solar cells are still less than 20%. [ 20,25,26 ]…”

Section: Figurementioning

confidence: 99%

Application of Phosphorus‐Doped Polysilicon‐Based Full‐Area Passivating Contact on the Front Textured Surface of p‐Type Silicon

Ding

Zhuang²,

Cui³

et al. 2020

Physica Rapid Research Ltrs

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A p‐type crystalline silicon (c‐Si) passivated emitter and rear contact (PERC) nowadays have become mainstream in the highly competitive photovoltaic market. Herein, the recently popular passivating contact concept on the front textured surface of p‐type c‐Si PERC solar cells is applied. The full‐area textured passivating contact consists of an ultrathin SiO2 film of ≈1.5 nm thickness grown with thermal oxidation and phosphorus‐doped polysilicon (poly‐Si) contact layer by low‐pressure chemical vapor deposition. A detailed investigation of poly‐Si with different crystalline structures, doping conditions, and thicknesses on the passivation effect and parasitic absorption loss is carried out. Preliminary achievement of 21.3% efficiency is realized in large‐area (244.3 cm2) p‐PERC c‐Si solar cells without the need for additional laser selective redoping. Theoretical calculation expects that the cell efficiency can be enhanced to 23.4% by decreasing the recombination current to a reasonable level. It is demonstrated that further improvement of low‐cost p‐PERC c‐Si solar cells is feasible using the full‐area textured passivating contact processes which are fully compatible with existing production lines.

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Double-sided TOPCon solar cells on textured wafer with ALD SiOx layer

Cited by 42 publications

References 38 publications

Role of silicon surface, polished 〈100〉 and 〈111〉 or textured, on the efficiency of double‐sided TOPCon solar cells

Role of silicon surface, polished 〈100〉 and 〈111〉 or textured, on the efficiency of double‐sided TOPCon solar cells

Advanced textured monocrystalline silicon substrates with high optical scattering yields and low electrical recombination losses for supporting crack‐free nano‐ to poly‐crystalline film growth

Application of Phosphorus‐Doped Polysilicon‐Based Full‐Area Passivating Contact on the Front Textured Surface of p‐Type Silicon

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