Double Pole Four Throw switch design with CMOS inverter

Srivastava, Viranjay M.; Yadav, K. S.; Singh, Ghanshyam

doi:10.1109/wcsn.2009.5434786

Cited by 16 publications

(9 citation statements)

References 5 publications

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“…1(a). In this paper, we have extend our recently reported work [15] and proposed a DP4T switch design and replace the CMOS inverter property with DP4T RF switches, by using DG CMOS for 45-nm technology. This design of double-gate transistors resolves the problem of short channel effect that occurs in MOSFET structures.…”

mentioning

confidence: 70%

“…Note that the minimal change in element characteristics over 0 to 5 V range, validating the use of these devices at lower control voltages. For this purpose at 0.8-µm technology DP4T DG RF CMOS switch design we compare L = 0.8 µm and W = 400 µm with the L = 2.0 µm and W = 4000 µm (aspect ratio is 500 and 2000 respectively) and for 45-nm technology switch design we compare L = 0.045 µm, W = 22.5 µm, with L = 0.045 µm, W = 90 µm (where aspect ratio is 500 and 2000 respectively same as before), here we discussed the attenuation, which is found that at lower size, attenuation is lower [15,[33][34][35][36]. Attenuation measurements were performed on the 0.8-µm and 45-nm technology by varying the gate control voltage (V CT L ) over a 0 to 1.2 volt range.…”

Section: Attenuation ('On' Switch Resistance)mentioning

confidence: 99%

“…It is clear from [14] that the scaling trends properly exploited and combined with new insights into the device and oscillator noise enables the CMOS IC technology to perform at GHz frequencies to make it attractive for application specific once thought the sole province of more exotic technologies. Srivastava et al [15] have proposed a DP4T switch design with CMOS inverter property, which was improved version of already existing DP4T switch.…”

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confidence: 99%

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Analysis of double-gate CMOS for double-pole four-throw RF switch design at 45-nm technology

2011

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In this paper, we have analyzed a 45-nm RF CMOS switch design technology with the double-pole fourthrow circuit by using independently controlled double-gate MOSFET. The proposed switch reduces the number of transistors and increases the logic density per unit area as compare to the conventional CMOS switch. With the unique independent double-gate properties, we have demonstrated the potential advantages in terms of the drain current, threshold voltage, attenuation with ON resistance, flat-band capacitances, charge density and power dissipation of the proposed switch, which provides a switch with a significant drive circuit that is free from the signal propagation delay and additional voltage power supply. Moreover, the main emphasis is to provide a plurality of such switches arranged in a densely configured switch array, which provides a lesser attenuation, and better isolation with fast switching speed.

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confidence: 70%

Section: Attenuation ('On' Switch Resistance)mentioning

confidence: 99%

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confidence: 99%

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Analysis of double-gate CMOS for double-pole four-throw RF switch design at 45-nm technology

2011

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“…We can experiment with program flow and data processing with only LCR meter and VEE programming. VEE provides an Instrument Manager and a Dynamic input/output (I/O) server to simplify the tasks of discovering, configuring, and managing external instruments [8][9][10]. The VEE supports several types of instrument drivers.…”

Section: Introductionmentioning

confidence: 99%

Characterization Process of MOSFET with Virtual Instrumentation for DP4T RF Switch – A Review

Srivastava¹,

Yadav²,

Singh³

2011

WSN

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With the increasing interest in radio frequency switch by using the CMOS circuit technology for the wireless communication systems is in demand. A traditional n-MOS Single-Pole Double-Throw (SPDT) switch has good performances but only for a single operating frequency. For multiple operating frequencies, to transmitting or receiving information through the multiple antennas systems, known as MIMO system, a new RF switch is required which should be capable of operating with multiple antennas and frequencies as well as minimizing signal distortions and power consumption. We already have proposed a Double-Pole Four-Throw (DP4T) RF switch and in this research article we are discussing a process for the characterization of the MOSFET with Virtual Instrumentation. The procedure to characterize oxide and conductor layers that are grown or deposited on semiconductors is by studying the characteristics of a MOS capacitor that is formed of the conductor (Metal)-insulator-semiconductor layers for the purpose of RF CMOS as a switch is presented. For a capacitor formed of Metal-silicon dioxide-silicon layers with a thick oxide measured optically. Some of the calculated material parameters are away from the expected values. These errors might be due to several factors such as a possible offset capacitance of the probes due to improper contact with the wafer which is measured by using the LCR (Inductance-Capacitance-Resistance) meter with the help of Visual Engineering Environment Programming (VEE Pro, a Agilent product).

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“…In the design of DP4T DG RF CMOS switch structures with 45-nm technology for digital and analog, a transaction between speed and frequency response and circuit complexity is always encountered. The properties for RF CMOS switch design for the application in communication and designed results are presented and have been designed to optimize for the particular application [14]. A DP4T DG RF CMOS switch has the properties as fixed tuned matching networks, low quality factor matching networks, high power output, mounting flange packages, and silicon grease.…”

Section: Introductionmentioning

confidence: 99%

Performance of Double-Pole Four-Throw Double-Gate RF CMOS Switch in 45-nm Technology

Srivastava¹

2010

WET

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In this paper, we have investigated the design parameters of RF CMOS switch, which will be used for the wireless telecommunication systems. A double-pole four-throw double-gate radio-frequency complementary-metal-oxide-semiconductor (DP4T DG RF CMOS) switch for operating at the 1 GHz is implemented with 45-nm CMOS process technology. This proposed RF switch is capable to select the data streams from the two antennas for both the transmitting and receiving processes. For the development of this DP4T DG RF CMOS switch we have explored the basic concept of the proposed switch circuit elements required for the radio frequency systems such as drain current, threshold voltage, resonant frequency, return loss, transmission loss, VSWR, resistances, capacitances, and switching speed.

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Double Pole Four Throw switch design with CMOS inverter

Cited by 16 publications

References 5 publications

Analysis of double-gate CMOS for double-pole four-throw RF switch design at 45-nm technology

Analysis of double-gate CMOS for double-pole four-throw RF switch design at 45-nm technology

Characterization Process of MOSFET with Virtual Instrumentation for DP4T RF Switch – A Review

Performance of Double-Pole Four-Throw Double-Gate RF CMOS Switch in 45-nm Technology

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