2011
DOI: 10.1557/jmr.2011.214
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Doping of semiconductor nanowires

Abstract: 9Populärvetenskaplig sammanfattning 11List of papers 15 AbstractIn this thesis, in situ doping during growth of III-V semiconductor nanowires, primarily for photovoltaic applications, is investigated. The nanowires were grown by metalorganic vapor phase epitaxy (MOVPE), with gold seed particles. After growth the nanowires were characterized using various techniques, including photoluminescence, transmission electron microscopy and electrical measurements of contacted nanowires. Different III-V materials were … Show more

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Cited by 144 publications
(133 citation statements)
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“…Axial NW heterostructures, however, can be grown with large lattice mismatch since the strain can be relaxed vertically, and here we demonstrate devices with a bandgap close to the theoretical limit. Controlled doping is necessary for most applications, 12 and here we use DEZn and H 2 S for p-and n-doping of GaInP. We demonstrate axially defined GaInP p-i-n junctions with yellow-green electroluminescence.…”
mentioning
confidence: 99%
“…Axial NW heterostructures, however, can be grown with large lattice mismatch since the strain can be relaxed vertically, and here we demonstrate devices with a bandgap close to the theoretical limit. Controlled doping is necessary for most applications, 12 and here we use DEZn and H 2 S for p-and n-doping of GaInP. We demonstrate axially defined GaInP p-i-n junctions with yellow-green electroluminescence.…”
mentioning
confidence: 99%
“…This in-situ method of doping nanomaterials is promising but the challenges of scale-up and large scale integration in addition to the problematic concentration gradients still remain. 9 Recently, a facile approach for controllable doping of semiconductor nanostructures was introduced, termed monolayer doping (MLD). 10 MLD comprises two steps: i) functionalization of the semiconductor surface with a p-or n-dopant containing molecule and ii) thermal diffusion of those dopant atoms into a semiconductor by a rapid thermal anneal (RTA) step.…”
mentioning
confidence: 99%
“…The electrical measurements included conventional 4-point current-voltage measurements and back-gate field-effect transistor (FET) type measurements. The back-gate FET measurement principle and theory using the drude model is explained in detail elsewhere 24 . The carrier concentration p can be obtained from the following expression:…”
Section: Experimental and Theorymentioning
confidence: 99%
“…where ε r is the relative dielectric constant, ε 0 is the vacuum permittivity, R is the NW radius, and h is the distance between the gate and the NW 24 . Several assumptions are made to obtain equation (3), which cause it to give higher capacitance than in reality 24 .…”
Section: Experimental and Theorymentioning
confidence: 99%
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