Domain Partitioning Technology for Embedded Multicore Processors

Nojiri, Tohru; Kondo, Yuki; Irie, Naohiko; Itô, Masayuki; Sasaki, Haruka; Maejima, Hiroshi

doi:10.1109/mm.2009.96

Cited by 11 publications

(4 citation statements)

References 5 publications

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“…The approach presented in [9] targets system-on-chip (SoC) platforms with a single processor whose tasks need to be isolated from certain memory regions and I/O controllers. Similar approaches that are targeted at multi-master platforms are described in [10] and [11]. These approaches are comparable to the APU mechanism described above.…”

Section: Related Workmentioning

confidence: 95%

A Formal Model for the Automatic Configuration of Access Protection Units in MPSoC-Based Embedded Systems

Dörr

Sandmann

Becker

2020

2020 23rd Euromicro Conference on Digital System Design (DSD)

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Heterogeneous system-on-chip platforms with multiple processing cores are becoming increasingly common in safetyand security-critical embedded systems. To facilitate a logical isolation of physically connected on-chip components, internal communication links of such platforms are often equipped with dedicated access protection units. When performed manually, however, the configuration of these units can be both time-consuming and error-prone. To resolve this issue, we present a formal model and a corresponding design methodology that allows developers to specify access permissions and information flow requirements for embedded systems in a mostly platform-independent manner. As part of the methodology, the consistency between the permissions and the requirements is automatically verified and an extensible generation framework is used to transform the abstract permission declarations into configuration code for individual access protection units. We present a prototypical implementation of this approach and validate it by generating configuration code for the access protection unit of a commercially available multiprocessor system-on-chip.

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Section: Related Workmentioning

confidence: 95%

A Formal Model for the Automatic Configuration of Access Protection Units in MPSoC-Based Embedded Systems

Dörr

Sandmann

Becker

2020

2020 23rd Euromicro Conference on Digital System Design (DSD)

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“…From an on-chip perspective, hardware units to control transactions on the shared interconnect [16] have been presented as a potential security measure and are comparable to APUs available on modern MPSoCs. The methodology from [7] builds up on this concept and combines it with a static analysis of how information is able to propagate through the system, which again has similarities to information flow tracking schemes such as the one presented in [17].…”

Section: Related Workmentioning

confidence: 99%

Employing the Concept of Multilevel Security to Generate Access Protection Configurations for Automotive On-Board Networks

Dörr

Sandmann

Mohr³

et al. 2021

2021 24th Euromicro Conference on Digital System Design (DSD)

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Future automotive on-board networks are expected to integrate various functions on only a few centralized processing platforms. Combined with attack surfaces that originate from the external connectivity of modern vehicles, this turns the design of secure on-board networks into a challenging endeavor. Therefore, we present a formal model to describe both confidentiality and integrity requirements of applications in such a network using security levels. The proposed model is then integrated into an existing design methodology for the automatic configuration of access protection units in MPSoCs. The resulting methodology ensures that the above-mentioned requirements are automatically enforced during runtime and is validated using a safety-critical example scenario from the automotive domain.

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“…The proposed interface has been developed in order to provide homogeneous interface for all applications. Nojiri et al [2009] presented a hardware module which permits segregation between critical and noncritical services to make application safer. Senouci et al [2006] addressed the same issue and proposed a POSIX API running on top of the Mutek operating system.…”

Section: Related Workmentioning

confidence: 99%

Enhancing Reconfigurable Platforms Programmability for Synchronous Data-Flow Applications

Gantel

Khiar

Miramond

et al. 2012

ACM Trans. Reconfigurable Technol. Syst.

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Recent FPGAs allow the design of efficient and complex Heterogeneous Systems-on-Chip (HSoC). Namely, these systems are composed of several processors, hardware accelerators as well as communication media between all these components. Performances provided by HSoCs make them really interesting for data-flow applications, especially image processing applications. The use of this kind of architecture provides good performances but the drawback is an increase of the programming complexity.This complexity is due to the heterogeneous deployment of the application on the platform. Some functions are implemented in software to run on a processor, whereas other functions are implemented in hardware to run in a reconfigurable partition of the FPGA. This article aims to define a programming model based on the Synchronous Data-Flow model, in order to abstract the heterogeneity of the implementation and to leverage the communication issue between software and hardware actors.

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Domain Partitioning Technology for Embedded Multicore Processors

Cited by 11 publications

References 5 publications

A Formal Model for the Automatic Configuration of Access Protection Units in MPSoC-Based Embedded Systems

A Formal Model for the Automatic Configuration of Access Protection Units in MPSoC-Based Embedded Systems

Employing the Concept of Multilevel Security to Generate Access Protection Configurations for Automotive On-Board Networks

Enhancing Reconfigurable Platforms Programmability for Synchronous Data-Flow Applications

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