2019 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing (PACRIM) 2019
DOI: 10.1109/pacrim47961.2019.8985059
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Does the ISA Really Matter? A Simulation Based Investigation

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Cited by 3 publications
(2 citation statements)
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“…While this approach maintains the appearance of traditional x86 operation to external observers, it internally executes RISC-like instructions [2]. In order to check which ISA is better many experiments are already done but these experiments and research is on the real hardware our experiment is on the gem5 simulator which is the model accurate simulator [3][4][5]. Gem5 is the simulator that made by the merging of two simulator M5 by the University of Michigan and gems by the University of Wisconsin.Gem5 has various ISA like MIPS, RISCV, X86, ARM, ALPHA, POWER and SPARC.…”
Section: Introductionmentioning
confidence: 99%
See 1 more Smart Citation
“…While this approach maintains the appearance of traditional x86 operation to external observers, it internally executes RISC-like instructions [2]. In order to check which ISA is better many experiments are already done but these experiments and research is on the real hardware our experiment is on the gem5 simulator which is the model accurate simulator [3][4][5]. Gem5 is the simulator that made by the merging of two simulator M5 by the University of Michigan and gems by the University of Wisconsin.Gem5 has various ISA like MIPS, RISCV, X86, ARM, ALPHA, POWER and SPARC.…”
Section: Introductionmentioning
confidence: 99%
“…Another comprehensive exploration, undertaken by [5], involved an in-depth analysis of x86, ARM, and RISC-V Instruction Set Architectures (ISAs) within the gem5 framework. This investigation employed three distinct configurations: in-order, out-of-order1, and out-of-order2.…”
Section: Introductionmentioning
confidence: 99%