Division circuit using reversible logic gates

Gassoumi, Ismail; Touil, Lamjed; Ouni, Bouraoui

doi:10.1109/aset.2018.8379835

Cited by 6 publications

(2 citation statements)

References 9 publications

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“…We have categorized all the reversible gates present so far on the basis of the number of input-output vectors. [20] A⊕B B⊕C AB+BC+AC TS-3 [33] A B A⊕B⊕C RM [34] A⊕BC AB+AC AC+AB RG [35] A⊕B AB+BC+AC BC+A(B ⊕ C) RG1 [21] B AB+BC A⊕C G1 [36] B A B+AB A BC+AC+BC RG2 [21] A B ⊕C A ⊕ B A URLG [37] AB+BC+AC AB+BC+A C AB+B C+A C MPG [38] A A⊕B AB⊕C SAM [38] A AB⊕AC AC⊕AB R [34] A⊕B A C ⊕(AB) QCA1 [39] AB+BC+AC AB+BC+AC AB+BC+AC QCA2 [39] AB+BC+AC AB+BC+AC AB+BC+A C RQG [40] AB+BC+AC AB+BC+AC A⊕C Peres [41] A A⊕B AB⊕C URG [42] (A+B)⊕C B AB⊕C SSG [43] B⊕C A⊕B AB+BC+AC MNFT [44] (A⊕B)C⊕A A⊕B (A⊕B)C⊕A⊕C SRK [45] A…”

Section: Analysis Of Various Reversible Gatesmentioning

confidence: 99%

Reversible Gates: A Paradigm Shift in Computing

Naz

Shah

2023

IEEE Open J. Circuits Syst.

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The reversible gate has been one of the emerging research areas that ensure a continual process of innovation trends that explore and utilizes the resources. This review paper provides a comprehensive overview of reversible gates, including their fundamental principles, design methodologies, and various applications. It also analyzes the reversible gates, comparing them based on metrics such as Quantum Cost, Complexity, and other performance evaluation measures. The analysis of several reversible gates is presented in this paper and provides a comprehensive overview of reversible gates, encompassing their fundamental principles, design methodologies, and diverse applications. Reversible logic circuits allow for the production of both unique outputs and distinct input combinations. The majority of the findings about the reversible gates from previous research papers are discussed and contrasted. All the reversible gates that have been proposed till now are presented in tabular form and the parameters are discussed to help the researchers to find every detail related to the reversible gates. To highlight our understanding, we have ended most of the sections with questions. The inclusion of questions is likely intended to stimulate further discussion and promote a deeper understanding of the material presented in this paper. These questions can serve as prompts for readers to reflect on the content and potentially explore related research directions or areas of improvement.

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Section: Analysis Of Various Reversible Gatesmentioning

confidence: 99%

Reversible Gates: A Paradigm Shift in Computing

Naz

Shah

2023

IEEE Open J. Circuits Syst.

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“…The use of Reversible Logic Gates (RLG) in complex digital design reduces the complexity of the design. The RLG based division circuit exhibits improvisation in the performance characteristics compared to the conventional circuit [1]. The reversible computing gives advantages like high performance and improved energy efficiency [2].…”

Section: Introductionmentioning

confidence: 99%

Design and Implementation of PERES based 128 bit Parallel Adder using FPGA

Prathap*,

Chelsia,

Shivani

et al. 2019

IJITEE

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In this work, the parallel adder is designed using the PERES reversible logic gate with the resolution of 128 bits. The reversible logic gates have a unique property of one to one mapping between the input and output vectors. The simulation design is verified using the NI lab view tool for the resolution of 24 bits. For higher resolution designs, the HDL code is developed by making use of the Xilinx Spartan FPGA device. The HDL has several advantages like parallel processing, design compatibility, cost effective, reconfigurable, versatile language and design hierarchy. The performance of the proposed method is validated by comparing the area and power consumption with two FPGA devices.

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