Distributed modulo scheduling

Abstract

Wide-issue ILP machines can be built using the VLIW approach as many of the hardware complexities found in superscalar processors can be transferred to the compiler. However, the scalability of VLIW architectures is still constrained by the size and number of ports of the register file required by a large number of functional units. Organizations composed by clusters of a few functional units and small private register files have been proposed to deal with this problem, an approach highly dependent on scheduling and partitioning strategies. This paper presents DMS, an algorithm that integrates modulo scheduling and code partitioning in a single procedure. Experimental results have shown the algorithm is effective for configurations up to 8 clusters, or even more when targeting vectorizable loops.

Cluster assignment for high-performance embedded VLIW processors

“…Several research groups (see, e.g., Nystrom and Eichenberger [1998]; Fernandes et al [1999], and Sanchez and Gonzàlez [2001]) address binding in the context of modulo scheduling algorithms. The objective of modulo scheduling is to software pipeline the inner loop body (i.e., derive a retiming function for its operations), as well as determine adequate binding and scheduling functions, so as to minimize the loop's initiation interval (i.e., maximize throughput).…”

Integrated modulo scheduling and cluster assignment for TI TMS320C64x+ architecture

“…Additionally, loop unrolling is selectively applied for the reason of lowering the pressure on intercluster paths. Fernandes et al [11] describe distributed modulo scheduling, an alternative integrated approach that sequentially uses three strategies for cluster assignment. The first strategy tries to assign a node to a cluster without involving explicit intercluster transfers.…”

Dynamic cluster assignment mechanisms

“…Clustering can also be applied to VLIW architectures [8] [14]. In this case the partitioning is done at compile time.…”