1999
DOI: 10.1109/82.754864
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Distortion in elementary transistor circuits

Abstract: In this paper the distortion components are defined for elementary transistor stages such as a single-transistor amplifier and a differential pair using bipolar transistors or MOST's. Moreover, the influence of feedback is examined. Numerical examples are given for sake of illustration.

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Cited by 214 publications
(70 citation statements)
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“…The increase of linearity when using GC devices is related to the increased g m , caused by the effective channel length reduction, promoted by the GC channel engineering and reduced g D , since m D g g THD ∝ (19). In the case where devices with the same L eff are used, the total harmonic distortion is also expected to decrease, due to the reduced g D of GC transistors in comparison to standard ones, as mentioned before.…”
Section: Resultsmentioning
confidence: 90%
“…The increase of linearity when using GC devices is related to the increased g m , caused by the effective channel length reduction, promoted by the GC channel engineering and reduced g D , since m D g g THD ∝ (19). In the case where devices with the same L eff are used, the total harmonic distortion is also expected to decrease, due to the reduced g D of GC transistors in comparison to standard ones, as mentioned before.…”
Section: Resultsmentioning
confidence: 90%
“…The CMUT can be considered to exhibit weak nonlinearity since the harmonic distortion is a smooth function of input signal amplitude and gradually disappears as the input signal gets smaller and smaller [27]. Therefore the system dynamics can be represented as a Volterra series relationship between input signal and output pressure.…”
Section: Large Signal Cmut Behavior: Phase Analysismentioning
confidence: 99%
“…4(a), can potentially achieve high (NSNR) when compared to other alternatives [17]. However, for low loop gain, the square-law term of a MOSFET can be problematic as it indirectly generates third-order distortion [18], [21]. To understand this intuitively, for simplicity of explanation, assume that MOS transistors are ideal square law devices.…”
Section: Improving Cmos Transconductor Linearity -Resistive Sourmentioning
confidence: 99%
“…A similar effect happens in the degenerated PMOS transistor and when the two outputs currents are added, the degenerated CMOS inverter can have more third-order distortion than a CMOS inverter under the same biasing conditions. This may be a key reason for the rather rare use of degeneration in MOS based LNTAs, where the available loop gain is limited at RF [18], [21].…”
Section: Improving Cmos Transconductor Linearity -Resistive Sourmentioning
confidence: 99%
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