Dislocation sink annihilating threading dislocations in strain-relaxed Si_1−xGe_xlayer

Abstract

We proposed a dislocation sink technology for achieving Si 1−x Ge x multi-bridge-channel fieldeffect-transistor beyond 5 nm transistor design-rule that essentially needs an almost crystallinedefect-free Si 1−x Ge x channel. A generation of a dislocation sink via H + implantations in a strainrelaxed Si 0.7 Ge 0.3 layer grown on a Si substrate and a following annealing almost annihilate completely misfit and threading dislocations located near the interface between a relaxed Si 0.7 Ge 0.3 layer and a Si substrate. A real-time (continuous heating from room temperature to 600 °C) in situ high-resolution-transmission-electron-microscopy and inverse-fast-Fouriertransform image observation at 1.25 MV acceleration voltage obviously demonstrated the annihilation process between dislocation sinks and remaining misfit and threading dislocations during a thermal annealing, called the [Si I or Ge I +V Si or V Ge →Si 1−x Ge x ] annihilation process, where Si I , Ge I , V Si , and V Ge are interstitial Si, interstitial Ge, Si vacancy, and Ge vacancy, respectively. In particular, the annihilation process efficiency greatly depended on the dose of H + implantation and annealing temperature; i.e. a maximum annihilation process efficiency achieved at 5×10 15 atoms cm −2 and 800 °C.

Structural evolution of in situ boron-doped SiGe ultrathin film analyzed by multi-optical methods

“…The most challenging aspect in the application of field-effect transistors (FETs) is overcoming the increased level of shortchannel effects (SCEs) and leakage current when attempting to enhance performance of nanodevices [1][2][3]. Strain engineering in nano-devices is a common solution to deal with SCEs involving the application of high-mobility materials, such as SiGe and Ge, in the channel region [4,5].…”