2016 IEEE International Conference on Cloud Computing Technology and Science (CloudCom) 2016
DOI: 10.1109/cloudcom.2016.0018
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Disaggregated FPGAs: Network Performance Comparison against Bare-Metal Servers, Virtual Machines and Linux Containers

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Cited by 22 publications
(13 citation statements)
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“…The shell contains the common components required by all applications such as communication controllers (PCI end point, network controller, off-chip memory controller), clock management, routing (if multiple vFPGAs are allowed) and reconfiguration management (if dynamic reconfiguration is supported). Researches refer to the static region using different names such as static logic [6], [8], RC2F [5], service layer [9], vendor logic [13], [14], Network Service Layer [28], FPGA hypervisor [7], [12] and shell [10], [11]. The role region is usually a dynamically reconfigurable region [8], [9], [13], [5].…”
Section: Related Workmentioning
confidence: 99%
“…The shell contains the common components required by all applications such as communication controllers (PCI end point, network controller, off-chip memory controller), clock management, routing (if multiple vFPGAs are allowed) and reconfiguration management (if dynamic reconfiguration is supported). Researches refer to the static region using different names such as static logic [6], [8], RC2F [5], service layer [9], vendor logic [13], [14], Network Service Layer [28], FPGA hypervisor [7], [12] and shell [10], [11]. The role region is usually a dynamically reconfigurable region [8], [9], [13], [5].…”
Section: Related Workmentioning
confidence: 99%
“…ese tightly coupled servers enable an acceleration of local applications to meet performance demands. e second approach considers FPGA as a standalone disaggregated component [36] independent from the CPU. FPGA is then directly connected to the network [29].…”
Section: Fpga For Cloudmentioning
confidence: 99%
“…[11] implements NVMe disaggregation, but unlike the work presented in this paper, the authors focus on a custom software layer to expose devices instead of using the NVMeOF standard. On the other hand, [18] evaluates the impact of FPGA disaggregation.…”
Section: Related Workmentioning
confidence: 99%