Directed Self‐Assembly for Dense Vertical III–V Nanowires on Si and Implications for Gate All‐Around Deposition

Abstract

Fabrication of next generation transistors calls for new technological requirements, such as reduced size and increased density of structures. Development of cost‐effective processing techniques to fabricate small‐pitch vertical III–V nanowires over large areas will be an important step toward realizing dense gate all‐around transistors, having high electron mobility, and low power consumption. It is demonstrated here, how arrays of III–V nanowires with a controllable number of rows, ranging from one single row up to bands of 500 nm, can be processed by directed self‐assembly (DSA) of block copolymer (BCP). Furthermore, it is shown that the DSA‐orientation with respect to the substrate's crystal direction affects the nanowire facet configuration, and thereby the nanowire spacing and gate all‐around deposition possibilities. A high χ poly(styrene)‐block‐poly(4‐vinylpyridine) BCP pattern directed by electron beam lithography‐defined guiding lines is transferred into silicon nitride. The silicon nitride is then used as a selective area metal‐organic vapor phase epitaxy mask atop an indium arsenide (InAs) buffer layer on a silicon platform to grow vertical InAs nanowires at 44–60 nm row pitch. Finally, deposition of high‐κ oxide and titanium nitride at this high pattern density is demonstrated, to further illustrate the considerations needed for next generation transistors.

A Concept from Sensor to Sustainability in Machining – An Interdisciplinary Approach over a Wide TRL Range

“…Widespread implementation of sensors directly into harsh and hard to access industrial environments such as machining has been an ongoing scientific and technological goal for many years [1] but has still not occurred. One reason for renewed optimism is the significant progress in micro and nanofabrication which has occurred in the last decade [12][13][14][15][16][17][18][19][20][21][22][23][24][25][26]. Exact bottom-up synthesis is now possible for a wide range of electronic materials with varying properties and top-down lithography has evolved not only in terms of miniaturization (which is well publicized [17]), but also in regard to the creation of a wide variety of 1D, 2D and 3D structures [12][13][14][15][16][17][18][19][20][21][22].…”

“…One reason for renewed optimism is the significant progress in micro and nanofabrication which has occurred in the last decade [12][13][14][15][16][17][18][19][20][21][22][23][24][25][26]. Exact bottom-up synthesis is now possible for a wide range of electronic materials with varying properties and top-down lithography has evolved not only in terms of miniaturization (which is well publicized [17]), but also in regard to the creation of a wide variety of 1D, 2D and 3D structures [12][13][14][15][16][17][18][19][20][21][22]. Metal droplet seeded or selective area growth using Chemical Vapor Deposition (CVD) methods makes it possible to form extremely well-defined compound structures with electrical device properties in specific locations even hidden from line-of-sight of the CVD tool [12][13][14].…”

“…In-fact metal patterns can be used to control synthesis as they change the local chemical environment, as have recently been shown [5]. These methods have been further combined with advanced lithographic structuring and fabrication of advanced layered structures in 3D combining many different types of materials [16,17,18]. In these methods combinations of layer-by-layer etching and deposition are used in combination with various types of masking both using polymers as well as shadow masks.…”