2008 9th International Conference on Ultimate Integration of Silicon 2008
DOI: 10.1109/ulis.2008.4527172
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Dimensional scaling effects on transport properties of ultrathin body p-i-n diodes

Abstract: Device scaling has been a subject of research for both optoelectronics and electronics. In order to investigate the electronic properties of scaled devices we studied lateral p-in structures using thin silicon on insulator (SOI) or poly-Si layers of varying dimension. With the help of these structures we try to explain the size dependencies on electronic transport properties. Further, we also propose a new device concept called charge plasma diode. Index Terms-diode, p-in diode, charge plasma (CP) diode, silic… Show more

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Cited by 15 publications
(17 citation statements)
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“…In this paper, a novel doping-less 1T-DRAM device, requiring a simplified fabrication process due to the absence of dopant implantation [2]- [3], [13]- [15], is presented through 2-dimensional simulations. For dynamic memory applications, the undoped region exhibits a higher carrier lifetime and reduced hole recombination which benefits to attain higher retention time [16], [17].…”
Section: Introductionmentioning
confidence: 99%
“…In this paper, a novel doping-less 1T-DRAM device, requiring a simplified fabrication process due to the absence of dopant implantation [2]- [3], [13]- [15], is presented through 2-dimensional simulations. For dynamic memory applications, the undoped region exhibits a higher carrier lifetime and reduced hole recombination which benefits to attain higher retention time [16], [17].…”
Section: Introductionmentioning
confidence: 99%
“…In the devices presented in this letter, the metallic contacts are extended to the top of the thin silicon body in order to reduce the contact resistance. As stated earlier [10], [11], there are two essential features in this concept. First, the workfunctions of the cathode and the anode metals should fulfill ϕ m,C < χSi + (E G /2) and ϕ m,A > χSi + (E G /2) in terms of the electron affinity of bulk silicon (χSi = 4.17 eV), and the bandgap of bulk silicon (E G ).…”
mentioning
confidence: 96%
“…Since a charge plasma p-n junction has already been experimentally demonstrated [9] and other low power [10 -25] and high power [26] …”
Section: Discussionmentioning
confidence: 99%
“…The "n + " source/drain regions and "p + " body contact are formed using the charge plasma concept by using metal electrodes of a specific work function [10,11]. The charge plasma concept is used to realize both low power devices [12][13][14][15][16][17][18][19][20][21][22][23][24][25] and a high power p-i-n diode [26]. We show in this work that LDMOS can also be implemented using the charge plasma principle and consequently reduce the number of thermal steps required during the fabrication.…”
Section: Introductionmentioning
confidence: 99%