Digital Signal Processing with Field Programmable Gate Arrays

Meyer-Baese, Uwe

doi:10.1007/978-3-662-06728-4

Cited by 89 publications

(54 citation statements)

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“…On the other hand, higher precision requires more operations and memories. It is true for other approaches such as Chebyshev approximation and CORDIC [10].…”

Section: Introductionmentioning

confidence: 83%

Fast Algorithm and Efficient Implementation of GMM-Based Pattern Classifiers

Watanabe

Muramatsu

2009

J Sign Process Syst

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This paper proposes a fast decision algorithm in pattern classification based on Gaussian mixture models (GMM). Statistical pattern classification problems often meet a situation that comparison between probabilities is obvious and involve redundant computations. When GMM is adopted for the probability model, the exponential function should be evaluated. This work firstly reduces the exponential computations to simple and rough interval calculations. The exponential function is realized by scaling and multiplication with powers of two so that the decision is efficiently realized. For finer decision, a refinement process is also proposed. In order to verify the significance, experimental results on TI DM6437 EVM board and TED TB-3S-3400DSP-IMG board are shown through the application to a color extraction problem. It is verified that the classification was almost completed without any refinement process and the refinement process can proceed the residual decisions.

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“…On the other hand, higher precision requires more operations and memories. It is true for other approaches such as Chebyshev approximation and CORDIC [10].…”

Section: Introductionmentioning

confidence: 83%

Fast Algorithm and Efficient Implementation of GMM-Based Pattern Classifiers

Watanabe

Muramatsu

2009

J Sign Process Syst

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“…Complex-valued addition is realized by a set of two real additions; complex-valued multiplication is realized by the conventional method, which requires four real multiplications and two real additions. Alternatively, an efficient complex-valued multiplication method can be applied, where the inherent dependencies of the partial products and sums are utilized to reduce the number of real multiplication operations; however, this method increases the number of real additions [12,13]. This fast complex-valued multiplication method may be described by the following equations [12]:…”

Section: Efficient Complex Multiplicationmentioning

confidence: 99%

Efficient Recursive IDFT Scheme for Complex-valued Signals in Tap-selective Maximum-likelihood Channel Estimation

Hwang

2009

J Sign Process Syst Sign Image Video Technol

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This paper presents several efficient, recursive inverse discrete Fourier transform (IDFT) schemes for complex-valued input data in tap-selective maximumlikelihood channel estimation; the results of their implementation are also presented. The proposed schemes employ only real-valued arithmetic, which reduces the number of required real multiplication operations in comparison with conventional IDFT approaches; however, the number of real additions increases significantly due to the sliding window scheme. The results show that the schemes can reduce the computational complexity and enhance flexibility when only several subsets of the IDFT output bins are required.

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“…However, this form suffers from significant fan-in to apply simultaneously the input data signal to all taps of the filter [1]. Figure 4 presents the canonical realizations of a four-tap adaptive FIR filter based on the LMS algorithm to adjust its coefficients [13]. The direct form of the LMS adaptive FIR filter (DF-LMS) can be described by the following equations:…”

Section: Parallel Fir Filtersmentioning

confidence: 99%

“…Both RAMs are configured in read after write. For a given data address i, the filter coefficient w i,k is updated using the LMS algorithm (see (13)) before multiplying it by the corresponding delayed data sample x k−i and accumulating the result (see (2)). …”

Section: Sequential Lms-based Adaptive Fir Filtermentioning

confidence: 99%

FPGA-Implementation of Parallel and Sequential Architectures for Adaptive Noise Cancelation

Bahoura

Ezzaidi

2011

Circuits Syst Signal Process

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This paper presents a FPGA-based rapid prototyping of an adaptive noise canceller (ANC) using XUP Virtex-II Pro development board and Xilinx System Generator. New parallel and sequential architectures of the ANC are proposed and successfully applied to remove noise from electrocardiogram and speech signals. The pipelined architecture were evaluated and compared to existing high-speed systems using objective measurement tests. By providing comparable filtering performances that of the parallel architectures, the proposed sequential system required fewer material resources.

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Digital Signal Processing with Field Programmable Gate Arrays

Abstract: Page 123 Table 2.11, m=1: Replace "YK=K1 (X0 cos(Z0)+Y0sin(Z0))" with "YK=K1 (Y0 cos(Z0)+X0sin(Z0))" Page 123 Table 2.11, m=-1: Replace "XK=K-1√X0 2 + Y0 2 " with "XK=K-1√X0 2-Y0 2 " Replace "YK=K-1 (X0 cosh(Z0)+Y0sinh(Z0))" with "YK=K-1 (Y0 cosh(Z0)+X0sinh(Z0)

Cited by 89 publications

References 0 publications

Fast Algorithm and Efficient Implementation of GMM-Based Pattern Classifiers

Fast Algorithm and Efficient Implementation of GMM-Based Pattern Classifiers

Efficient Recursive IDFT Scheme for Complex-valued Signals in Tap-selective Maximum-likelihood Channel Estimation

FPGA-Implementation of Parallel and Sequential Architectures for Adaptive Noise Cancelation

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