Digital RF Transmitter With Single-Bit $\Delta\Sigma$ M-Driven Switched-Capacitor RF DAC and Embedded Band Filter in 28-nm FD-SOI

Abstract

This paper presents a single-bit RF transmitter based on single-bit switched-capacitor RF digital-to-analog converters (DAC) embedded in an FIR filter (FIR-DAC). The transmitter system comprises a single-bit quadrature Delta-Sigma Modulator (ΔΣM), a digital mixer, and a 109-tap RF FIR-DAC stage with a single external inductor, combining D-A conversion with discrete and continuous time filtering. The onchip part of the FIR-DAC is built exclusively with CMOS inverters and Metal-Oxide-Metal (MOM) capacitors, which are implemented in the interconnect layers to propose a compact fully-digital solution, suitable for advanced CMOS nodes.A method for canceling redundant switching in the FIR-DAC is proposed to reduce its complexity and power consumption. Combining discrete and continuous-time filtering, the out-ofband quantization noise of the 1-bit RF signal is strongly attenuated below the level required by emission masks. The RF FIR-DAC prototype is implemented in 28nm FD-SOI CMOS technology with 10 metal layers and occupies a total active area of only 0.047 mm 2 . The overall power consumption is 38 mW at 4.6 dBm peak output power, 900 MHz carrier frequency and 1 V supply. FD-SOI body-bias Vt tuning is used to effectively correct mixing clock duty-cycle errors in order to perform precise highfrequency I/Q interleaving, which enables high image and local oscillator (LO) rejections. The resulting power consumption, surface and performance of the measured prototype make the proposed circuits and concepts particularly appropriate for use in emerging Internet of Things (IoT) applications.

A Time-Mode-Modulation Digital Quadrature Power Amplifier Based on 1-bit Delta–Sigma Modulator and Hybrid FIR Filter

“…4(a) cannot be utilized. The digital mixers widely used in the switched-capacitor-based digital TXs [31], [32] can achieve the upconversion of the 2-bit input, as shown in Fig. 6(a).…”

“…6. Output voltages of (a) conventional digital mixer for digital quadrature PAs [31], [32] and (b) the proposed mixer.…”

A Predistortion-Less Digital MIMO Transmitter With DTC-Based Quadrature Imbalance Compensation

“…This wide signal bandwidth does however result in significant sampling aliases around the 250-MHz sampling frequency offset. This could be improved by, e.g., increasing the oversampling rate, using digital interpolation filters [11], [12], or mixed signal finite impulse response filters with upsampling to 4 f c [4]. An overview of EVM, ACLR, average output power P avg and average RF-DAC DE η avg for these modulated carriers are shown in Table I.…”

“…Combined with the wide RF bandwidth, this in a high data rate of 1.18 Gbps. 4 The 3.2% element efficiency is high for a…”

“…In these scenarios, system efficiency can benefit from a transmitter that is linear enough to function without DPD, even when this comes at the cost of PA drain efficiency (DE). Direct digital RF transmitters have shown high DPD-less linearity with better than −35-dB EVM [2], [3], [4], [5], [6], [7], [8], as required for 1024 QAM [9], and are CMOS compatible. Direct digital RF transmitters for MIMO have been demonstrated [10], [11], [12], [13] with a best achieved EVM of −30 dB [13].…”