Proceedings of the 20th Annual Conference on Integrated Circuits and Systems Design 2007
DOI: 10.1145/1284480.1284523
|View full text |Cite
|
Sign up to set email alerts
|

Digital PM demodulator for brazilian data collecting system

Abstract: This paper presents the project and implementation results of a digital PM demodulator system for processing LEO satellite signals from Brazilian Data Collecting System. The demodulator was implemented on the Altera Cyclone II DSP Development Kit equipped with FPGA EP2C70. Demodulation is done with a second order Digital Phase Locked Loop (DPLL) with -π to π linear phase detector realized by a CORDIC algorithm operating on vectoring mode. The parameters of the DPLL were calculated using control system theory.

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...

Citation Types

0
0
0

Publication Types

Select...

Relationship

0
0

Authors

Journals

citations
Cited by 0 publications
references
References 3 publications
(3 reference statements)
0
0
0
Order By: Relevance

No citations

Set email alert for when this publication receives citations?