Differential turbo-coded modulation with APP channel estimation

Abstract

Abstract-A serially concatenated coding system which can operate without channel state information (CSI) with use of a simple channel estimation technique is presented. This channel estimation technique utilizes the inner decoder's a posteriori probability (APP) information about the transmitted symbols to form a channel estimate for each symbol interval, and is termed APP channel estimation. The serially concatenated code (SCC) is comprised of an outer rate 2/3 binary error control code, separated by a bit interleaver from an inner code consisting of an 8-PSK bit mapping and differential 8-PSK modulation. Coherent decoding provides bit error rate (BER) performance 0.6 dB from 8-PSK capacity for large interleaver sizes. APP channel estimation decoding without initial CSI over constant and random walk phase models shows near-coherent results, with fractions of a dB performance loss for random walk and linear phase models.

Near-Capacity Wireless System Design Principles

“…• Serial Concatenated Convolutional (SCC) codes are typically constructed by concatenating M component codes in order to constitute a more powerful amalgamated code, where M component encoders are separated by M − 1 interleavers [8], [37].…”

Performance of Linear Block Codes Concatenated with Differential PSK

“…Proposed codes include repetition [3], concatenated single parity check (SPC) [9], Hamming [6], [4] and extended Bose Chaudhuri Hocquenghem (eBCH) [8] codes. More recently, researchers have looked at replacing the accumulator with a (rate-1) Mary differential phase shift keying (M -DPSK) modulator [5], [10], which allows reasonable performance for an unknown phase. SPC codes [5] and double parity check (DPC) codes [10] have been proposed for use with the DPSK modulator.…”

“…More recently, researchers have looked at replacing the accumulator with a (rate-1) Mary differential phase shift keying (M -DPSK) modulator [5], [10], which allows reasonable performance for an unknown phase. SPC codes [5] and double parity check (DPC) codes [10] have been proposed for use with the DPSK modulator. They allow good bit error rate (BER) performance to be achieved in the waterfall region and have error floors below 10 −6 .…”

“…In this letter we investigate the BER and FER performance of various linear block codes concatenated with a DPSK modulator. Our aim is to significantly improve the FER performance compared to [5], [10]. The cost of the lower error floor is a slight loss in BER and/ or FER performance in the waterfall region or a loss in code rate.…”

Differentially-Encoded Turbo Coded Modulation with APP Channel Estimation

“…An 8-PSK mapping described in [18], designed to increase the minimum distance of this system, which is 1.172 for natural mapping, is used. Natural mapping provides a 0.2 dB advantage in turbo cliff onset, at the cost of a higher error floor [18]. .…”