Differences in the sub-processes of ultra fine pitch stencil printing due to type-6 and type-7 Pb-free solder pastes used for flip chip

Jackson, G.J.; Hendriksen, M.W.; Durairaj, R.; Ekere, N.N.; Desmulliez, Marc Phillipe Yves; Kay, Robert W.

doi:10.1109/ectc.2003.1216332

Cited by 12 publications

(8 citation statements)

References 12 publications

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“…An industry rule of thumb states that, in order for the stencil apertures to be filled during the printing process, the average particle size ratio must be less than five times the aperture diameter. The subsequent changes in PSD do affect the solder paste properties; for example, moving from a type 3 to a type 6 PSD increases the number of particles (per unit volume) by a factor of 15 and the fine particles in the solder pastes will inherently alter the paste rheology (Jackson et al , 2003; Xiao et al , 1992). In addition, for a given oxide thickness, more oxide will be present in the paste as the ratio of surface area to volume increases as shown in Figure 8 (Lea, 1988).…”

Section: Printing Materialsmentioning

confidence: 99%

A review of stencil printing for microelectronic packaging

Kay

Desmulliez

2012

Soldering &Amp; Surface Mount Technology

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PurposeThe purpose of this paper is to present a detailed overview of the current stencil printing process for microelectronic packaging.Design/methodology/approachThis paper gives a thorough review of stencil printing for electronic packaging including the current state of the art.FindingsThis article explains the different stencil technologies and printing materials. It then examines the various factors that determine the outcome of a successful printing process, including printing parameters, materials, apparatus and squeegees. Relevant technical innovations in the art of stencil printing for microelectronics packaging are examined as each part of the printing process is explained.Originality/valueStencil printing is currently the cheapest and highest throughput technique to create the mechanical and electrically conductive connections between substrates, bare die, packaged chips and discrete components. As a result, this process is used extensively in the electronic packaging industry and therefore such a review paper should be of interest to a large selection of the electronics interconnect and assembly community.

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Section: Printing Materialsmentioning

confidence: 99%

A review of stencil printing for microelectronic packaging

Kay

Desmulliez

2012

Soldering &Amp; Surface Mount Technology

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“…From previous studies it has been shown that at 110µm pitch and below the type 7 paste performs better [8]. It is therefore necessary to evaluate the print characteristics at these dimensions using a type 7 paste.…”

Section: Discussionmentioning

confidence: 99%

“…The stencil contained 400,000 circular apertures across a 4" area. Experimentation has already demonstrated that circular apertures offer a better paste release compared to square apertures due to the lower surface area compared to pad open area and the lack of sharp corners which can trap the small particles of paste [8]. The design was split into 4 quadrants, with each quadrant containing a specific pitch and aperture diameter.…”

Section: Methodsmentioning

confidence: 99%

“…A previous study has been used to evaluate the printing behaviour of the latest type-6 and type-7 PSD Pb-free solder paste at ultra fine pitch and to identify any differences and understand failures in the printing process between the two pastes that could be related to the printing sub processes [8]. Failures in the printing process can be attributed to aperture blocking, insufficient aperture filling, paste scooping and paste bleeding.…”

Section: Paste Printing Attributesmentioning

confidence: 99%

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Stencil Printing Technology for Wafer Level Bumping at sub-100-Micron Pitch Using Pb-Free Alloys

Kay¹,

Gourcuff

Desmulliez

et al.

Proceedings Electronic Components and Technology, 2005. ECTC '05.

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“…Current pitches are limited to 150 micron (5.9 mils) and greater although some recent sub 100 micron experimental work has been published [2]. Apertures for full array applications are either round or square and in many cases rectangular for perimeter array designs.…”

Section: Introductionmentioning

confidence: 99%

Solder paste printing and stencil design considerations for wafer bumping

Lathrop

IEEE/CPMT/SEMI 29th International Electronics Manufacturing Technology Symposium (IEEE Cat. No.04CH37585)

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Recently wafer bumping using solder paste with very fine solder powder has come into focus as more cost effective than conventional sputtered or plated methods. This additive method revolves around a stencil printing process similar to conventional SMT with the exception of extremely small pitch and desired deposit size. An optimal print process for a high aperture density design has been established. Print process variables such as squeegee type, print gap, and separation speed are tested and quantified as to their effect of deposit variability. This study was done on 200mm wafers and involved over 6 million bump deposits. Results of a second study on the effects of stencil aperture size and shape combined with several stencil thicknesses on bump height and diameter variability are presented. This second study was done with both water soluble and no clean formulations and involved a total of 135 variables and over 68,000 measured bumps.A more recent study designed to push paste performance and stencil design to their limits in order to determine the maximum bump height possible in full array designs down to 150 micron pitch is discussed with preliminary results presented. The combination of the findings of all three studies results in a print process and stencil design recipe for producing consistent wafer bumps of various sizes.

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Differences in the sub-processes of ultra fine pitch stencil printing due to type-6 and type-7 Pb-free solder pastes used for flip chip

Cited by 12 publications

References 12 publications

A review of stencil printing for microelectronic packaging

A review of stencil printing for microelectronic packaging

Stencil Printing Technology for Wafer Level Bumping at sub-100-Micron Pitch Using Pb-Free Alloys

Solder paste printing and stencil design considerations for wafer bumping

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