Diagnosis for MRAM write disturbance fault

Abstract

To help improve quality and yield of magnetic random access memory (MRAM), we propose an adaptive diagnosis algorithm (ADA) that can efficiently identify the write disturbance fault (WDF) for MRAM. The proposed test algorithm is a Marchbased one, i.e., it has linear time complexity and can easily be implemented with built-in self-test (BIST). However, the proposed test method can evaluate the process stability and uniformity using logical test method. We also develop a BIST circuit that supports the proposed WDF diagnosis test method. We propose the BIST scheme based on the Decision Write mechanism of the toggle MRAM to reduce total test time. A 1Mb toggle MRAM prototype chip with the proposed BIST circuit has been designed and fabricated using a special 0.15 m CMOS technology. The BIST circuit overhead is only about 0.04% with respect to the 1Mb MRAM. The test time is reduced by about 30% as compared with the test method without using the Decision Write mechanism.