2006
DOI: 10.1109/led.2006.876308
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Device performance of transistors with high-/spl kappa/ dielectrics using cross-wafer-scaled interface-layer thickness

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Cited by 17 publications
(10 citation statements)
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“…This was performed on capacitors where the high-k was deposited on SiO 2 whose cross-wafer thickness is varied by chemical etching ͑slant etch͒. 7 The potential barrier between gate electrode and dielectric was evaluated using internal photoemission ͑IPE͒ spectroscopy. In the IPE experiment an ultraviolet light source is used to excite electrons in the MG. As the photon energy is increased towards the barrier height at the metal/dielectric interface, a photocurrent can be detected.…”
mentioning
confidence: 99%
“…This was performed on capacitors where the high-k was deposited on SiO 2 whose cross-wafer thickness is varied by chemical etching ͑slant etch͒. 7 The potential barrier between gate electrode and dielectric was evaluated using internal photoemission ͑IPE͒ spectroscopy. In the IPE experiment an ultraviolet light source is used to excite electrons in the MG. As the photon energy is increased towards the barrier height at the metal/dielectric interface, a photocurrent can be detected.…”
mentioning
confidence: 99%
“…The measured Hall mobilities were in the range of 3000-6000 cm /Vs which is an order of magnitude higher than the mobilities typically measured in Si channels [22]. In addition, for the bias range explored, the mobility increases with carrier concentration up to values of at least 1.4 10 cm .…”
Section: Electron Mobility and Sheet Densitymentioning
confidence: 58%
“…The schematic in Figure 2 shows the energy band diagram of an MIS structure. From this, we note that the metal work function can be expressed as follows WF analysis of metal gate electrodes on high-k dielectrics, by monitoring flat-band voltage, V FB (or threshold voltage, V TH ), have been demonstrated in the literature [7][8][9][10][11][12]. The studies report an undesirable shift in the V FB (or V TH ) of metal-oxide-semiconductor (MOS) devices.…”
Section: Work Function Extraction Methodologymentioning
confidence: 98%
“…To thoroughly investigate the WL metal and high-k liner combination, and its effect on erase operation, metal work function extraction experiments have been proposed and studied in this work. WF analysis of metal gate electrodes on high-k dielectrics, by monitoring flat-band voltage, VFB (or threshold voltage, VTH), have been demonstrated in the literature [7][8][9][10][11][12]. The studies report an undesirable shift in the VFB (or VTH) of metal-oxide-semiconductor (MOS) devices.…”
Section: Introductionmentioning
confidence: 99%
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