Device optimization for 200V GaN-on-SOI Platform for Monolithicly Integrated Power Circuits

Syshchyk, Olga; Cosnier, Thibault; Huang, Zheng‐Hong; Cingu, Deepthi; Wellekens, D.; Vohra, Anurag; Geens, Karen; Vudumula, Pavan; Chatterjee, Urmimala; Decoutere, Stefaan; Wu, Tian-Li; Bakeroot, Benoit

doi:10.1109/essderc55479.2022.9947150

Cited by 1 publication

(1 citation statement)

References 5 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…The monolithic integration of gallium nitride (GaN) integrated circuits (ICs) refers to the utilisation of a single fabrication process to integrate a number of power electronics functions onto a single GaN chip. This integrated approach offers several advantages over traditional discrete GaN devices, including a smaller size, lower power consumption, and improved performance [1]- [2]. Recently, significant progress has been made in the development of monolithic integration of GaN ICs.…”

Section: Introductionmentioning

confidence: 99%

Substrate Network Modeling for Lateral p-GaN Gate HEMTs in a 200V GAN-IC Platform

Alaei,

De Pauw,

Chatterjee

et al. 2023

2023 International Semiconductor Conference (CAS)

Self Cite

View full text Add to dashboard Cite

In a monolithically integrated GaN-IC, the parasitic inductance, capacitance and resistance between the driver and the half-bridge is greatly reduced. In a GaN-IC platform on SOI combined with oxide filled deep trench isolation, the backgating effect on the high-side power device is eliminated. Yet some issues related to the epitaxial stack and the substrate contact layer need to be addressed. In this paper, a substrate network concept is presented for 200V p-GaN gate HEMTs on SOI, and the impact of the epitaxial stack on device operation is investigated through modeling the epitaxial stack as a parallel R-C network. Double pulse tests were simulated and the impact on the substrate current was investigated. It is concluded that the substrate current peaks have a strong dependency on the epitaxial stack and the switching times, and that the peaks can be reduced by increasing the substrate layer resistivity.

show abstract

Section: Introductionmentioning

confidence: 99%