“…In order to achieve the realistic results, several important material parameters used in Silvaco Atlas were adjusted to obtain the closest agreement with published material data of 4H-SiC [6][7][8] . The major parameters used in the paper are shown in table 1.…”
Abstract. A novel n-SiC/p-Si/n-Si optically controlled transistor with charge compensation layer has been studied in the paper. The performance of the device is simulated using Silvaco Atlas tools, which indicates excellent performances of the device in both blocking state and conducting state. The device also has a good switching characteristic with 0.54μs as rising time and 0.66μs as falling time. With the charge compensation layer, the breakdown voltage and the spectral response intensity of the device are improved by 90V and 33A/W respectively. Compared with optically controlled transistor without charge compensation layer, the n-SiC/p-Si/n-Si optically controlled transistor with charge compensation layer has a better performance.
“…In order to achieve the realistic results, several important material parameters used in Silvaco Atlas were adjusted to obtain the closest agreement with published material data of 4H-SiC [6][7][8] . The major parameters used in the paper are shown in table 1.…”
Abstract. A novel n-SiC/p-Si/n-Si optically controlled transistor with charge compensation layer has been studied in the paper. The performance of the device is simulated using Silvaco Atlas tools, which indicates excellent performances of the device in both blocking state and conducting state. The device also has a good switching characteristic with 0.54μs as rising time and 0.66μs as falling time. With the charge compensation layer, the breakdown voltage and the spectral response intensity of the device are improved by 90V and 33A/W respectively. Compared with optically controlled transistor without charge compensation layer, the n-SiC/p-Si/n-Si optically controlled transistor with charge compensation layer has a better performance.
“…There are two mainstreams processing methods for a 4H-SiC insulated gate bipolar transistor (IGBT) at present: one is to make a good compromise between the forward and off characteristics of the device by properly setting the structural parameters of the device such as the n buffer's thickness and doping parameters [6], the minority carrier lifetime in the ndrift region [7,8], and thickness and doping parameters of the CSL (carrier storage layer) [9,10]; the other is by considering the process conditions and designing a special device structure that can improve by affecting certain characteristics, such as an anode short circuit IGBT [11,12], a super junction IGBT [13], or a collector trench IGBT (CT-IGBT) with an electronic extraction channel [14]. By analyzing the previous research, it can be observed that researchers have been mainly concerned with the compromise between the on-state and breakdown characteristics of IGBT devices, and that relatively little research has been made into the dynamic conversion characteristics of the device.…”
In this work, an insulated gate bipolar transistor (IGBT) is proposed that introduces a portion of the p-polySi/p-SiC heterojunction on the collector side to reduce the tail current during device turn-offs. By adjusting the doping concentration on both sides of the heterojunction, the turn-off loss is further reduced without sacrificing other characteristics of the device. The electrical characteristics of the device were simulated through the Silvaco ATLAS 2D simulation tool and compared with the traditional structure to verify the design idea. The simulation results show that, compared with the traditional structure, the turn-off loss of the proposed structure was reduced by 58.4%, the breakdown voltage increased by 13.3%, and the forward characteristics sacrificed 8.3%.
“…In past several years, some high-voltage 4H-SiC IGBTs with the breakdown voltage in range from 10 to 22 KV have been reported [12][13][14][15][16][17][18][19][20][21][22][23][24]. However, these works mostly focus on planar gate 4H-SiC IGBT and a few studies about 4H-SiC trench IGBT [12,15,22].…”
In this paper, a new 4H-SiC trench-gate IGBT structure incorporated a P + shielding region in the emitter side is proposed in order to reduce the on-state voltage drop. Through the 2-D ATLAS simulation, the characteristics of the proposed structure are investigated and compared with the conventional structure. The simulation results indicate that the proposed structure exhibits an improvement in the following. Firstly, the on-state voltage drop is reduced by 32.75%. Secondly, the differential specific on-resistance is reduced by 42.33%. Finally, under the same on-state voltage drop, the turn-off energy is reduced more than 50.00%. At the end of the paper, it is explored that what effects the physical parameter of the P + shielding region in the proposed structure have on the steady state performances.
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