Development, validation and application of a thermal model of a plastic quad flat pack

An Experimental Assessment of Computational Fluid Dynamics Predictive Accuracy for Electronic Component Operational Temperature

“…The importance o f this omission became obvious when later studies, using real components, showed that base conduction accounted for as much as 70% o f the total heat dissipation [77,102,103], As a result, more recent experimental studies by Arabzadeh et al [94], Nakayama and Park [104] and Tang and Ghajar [105] have addressed this issue by changing either the conductive resistance between the module base and substrate, or altering the substrate thermal conductivity to allow significant heat loss through the base. These studies highlighted that substrate conduction has a significant impact on module operating temperature, its thermal footprint size and substrate temperature gradients.…”

“…In general neglecting wire conduction is not a limitation as bond-wires do not represent a significant thermal path due to their small cross sectional area [103], In addition, for the PQFP devices, package heat spread is dominated by the heat slug.…”

“…or 'smeared' approach [103,256]. This permits these geometries to be modelled as single Note: keff = a ki + (1-a) k2, where a is the metal volumetric ratio, ki is the leadframe/lead thermal conductivity and k2 is the encapsulant/air thermal conductivity.…”

Effect of both PCB thermal conductivity and nature of forced convection environment on component operating temperature: Experimental measurement and numerical prediction

“…While these tools have the capability to assess complex thermal designs in a timely manner, previous studies have identified the ongoing need to validate numerical prediction accuracy and applicability of modelling methodologies by comparison with experimental analysis [7,8]. However, where such comparisons have been undertaken [9][10][11][12][13], these have focused mainly on characterising component performance on low conductivity test PCBs based on the recognised SEMI (Semiconductor Equipment and Materials International) or JEDEC (Joint Electronic Design Engineering Council) specifications [14,15]. Both standards specify single copper trace layer PCBs, for which a suitable modelling strategy exists [9][10][11][12][13].…”

“…However, where such comparisons have been undertaken [9][10][11][12][13], these have focused mainly on characterising component performance on low conductivity test PCBs based on the recognised SEMI (Semiconductor Equipment and Materials International) or JEDEC (Joint Electronic Design Engineering Council) specifications [14,15]. Both standards specify single copper trace layer PCBs, for which a suitable modelling strategy exists [9][10][11][12][13]. However, both SEMI and JEDEC recognised that these low conductivity test PCBs no longer represent the multilayer builds currently used in many applications and recently introduced high thermal conductivity standard test PCBs [16,17].…”