Development of Relationship Interface between High-level Synthesis and Web Browser-based Hardware Verification System with Virtual Peripheral

Abstract

In recent years, there has been a shortage of embedded engineers. FPGAs are used in the prototyping of products with embedded systems because their circuits can be rewritten many times, eliminating the need to develop a new microcontroller for each prototype and thus reducing design time and development costs. However, prototyping with FPGAs requires a great deal of knowledge, skill, and experience on the part of the developer. Futher reducing the burden of prototyping with FPGAs is a critical issue for rapid response to product single life cycles and early time-to-market. Therefore, we are developing a general-purpose browser-based hardware prototyping system that hides the actual peripherals and allows prototyping of FPGA hardware to be shared among development members via a network. So far, we have installed Linux on an FPGA board with a CPU-embedded FPGA and built a Web server. We have implemented the basic functions of remote hardware verification and introduced data upload and circuit switching functions. In this paper, we implement a high-level synthesis front-end function using Perl and Tcl scripts. Furthermore, we evaluate the usefulness of the high-level synthesis front-end by comparing the hardware conversion time of the conventional methos with the conversion time of the high-level synthesis front-end.