Development of CMOS Pixel Sensor Featuring Pixel-Level Discrimination for the ALICE-ITS Upgrade

Abstract

A 180 nm imaging CMOS technology is being used to develop CMOS pixel sensors (CPS) for the upgrade of the ALICE Inner Tracking System (ITS) [1,2]. The process allows in particular for full CMOS integration inside the pixels thanks to the available deep P-wells. Therefore, a novel concept of pixel with integrated discriminator was realized in order to develop a fast and powerefficient rolling shutter CPS architecture, called ASTRAL. Compared with the conventional CPS using column-level discrimination, the in-pixel discrimination sets the analogue processing within the pixel. Thus the analogue buffer driving the long-distance column bus is no longer needed and the static current consumption per pixel can be largely reduced, from 120 µA down to less than 15 µA. Moreover, the row processing time can be halved down to 100 ns thanks to small local parasitics. As a proof of concept, the prototype chip called AROM-0 was developed. Full functionality and noise performance of the chip have been validated in laboratory. Based on AROM-0, improved pixel designs have been implemented in the series of more advanced chips called AROM-1, which incorporate the intermediate design anticipating the upstream architecture of ASTRAL. It features an array of 64 × 64 pixels with double-row readout while integrating on chip the JTAG programmable biasing/reference and sequence control circuitry. This paper will mainly present the design and laboratory test results of AROM-0 and AROM-1 chips. Also, a brief introduction to the first prototype chip of the full scale building block for ASTRAL will be given, supposed to verify the full chain and functionality of the ASTRAL sensor.