Development of a radiation hard version of the analog pipeline chip APC128

Abstract

The Analog Pipeline Chip (APC) is a low noise, low power readout chip for silicon micro strip detectors with 128 channels containing an analog pipeline of 32 buffers depth. The chip has been designed for operation at HERA with a power dissipation of 300 − 400 µW per channel and has been used also in several other particle physics experiments. In this paper we describe the development of a radiation hard version of this chip that will be used in the H1 vertex detector for operation at the luminosity upgraded HERA machine. A 128 channel prototyping chip with several amplifier variations has been designed in the radiation hard DMILL technology and measured. The results of various parameter variations are presented in this paper. Based on this, the design choice for the final production version of the APC128-DMILL has been made.

The silicon tracker of the H1 detector

“…In the years 1997-2000, a signal over noise of 19 for the p-side and of 7 for the n-side were measured; the asymptotic impact parameter resolution was 57 mm. The new data indicate that the new DMILL version of the APC readout chip achieves a similar signal over noise ratio, as had been expected from laboratory measurements [6].…”

“…The CST was upgraded in 2001 and 2003 to the radiation-hard version APC128D [6] fabricated in DMILL technology. The BST and FST were upgraded in 2005 to a new, radiation hard version of the APC readout chip and an accompanying decoder chip, both of which were developed in a collaboration of DESY (Zeuthen), the Kirchhoff Institute for Physics of the University of Heidelberg, and the PSI.…”

Pixel Telescope to test pixel Phase II ROCs and sensors

“…The telescope has been designed around a specific silicon-strip sensor and accompanying readout chip, both of which were originally developed for the H1 vertex detector at HERA [1]. The strip sensor contains 512 strips with 25µm pitch.…”