Development and Verification of Protection Circuit for Hard Switching Fault of SiC MOSFET by Using Gate-Source Voltage and Gate Charge

IEEE J. Emerg. Sel. Topics Power Electron.

et al. 2022

To accelerate the broad application of silicon carbide (SiC) power MOSFETs, their short-circuit (SC) robustness and reliability must be thoroughly evaluated. This paper, therefore, presents an overview of related research methods aiming to meet that objective. Topics reviewed include the non-destructive tester (NDT) used to implement SC faults, extraction and analysis of degradation parameters, and failure analysis of SiC MOSFETs. Concerning the NDT, its design criteria and methods for evaluating SC robustness are discussed. After which, key parameters used to assess SC reliability and methods for investigating degradation mechanisms are discussed and summarized. Finally, failure analysis techniques and their contributions to failure mechanisms are reviewed.

Section: Introductionmentioning

confidence: 99%

Review of Methodologies for Evaluating Short-Circuit Robustness and Reliability of SiC Power MOSFETs

Cui

Xin

IEEE J. Emerg. Sel. Topics Power Electron.

et al. 2022

“…A digital-controlled method is proposed to simplify the hardware design using the microcontroller. Compared with the previous works [17,19,20] which replied on the discrete analog ICs and logic gates, this method is more flexible since the microcontroller is part of power electronics system, which brings little increase in the hardware cost. 2.…”

Section: Introductionmentioning

confidence: 99%

“…The SC fault can be categorized into two types: hard switching fault (HSF) and fault under load (FUL), which are defined by the time when the SC fault happens at the turn‐on transition and on‐state, respectively. Several SC protection circuits have been proposed in the early works, including desaturation [8–10], current [11],

di/dt

[12, 13], DC‐link voltage [14], gate voltage [15, 16] and gate charge [17–20], and a SC protection time below 1

\umu

s was achieved. The desaturation detection is the most widely used solution with lots of off‐the‐shelf gate driver integrated chips (ICs) [21, 22].…”

Section: Introductionmentioning

confidence: 99%

“…The main contributions of this work are summarized as below: A digital‐controlled method is proposed to simplify the hardware design using the microcontroller. Compared with the previous works [17, 19, 20] which replied on the discrete analog ICs and logic gates, this method is more flexible since the microcontroller is part of power electronics system, which brings little increase in the hardware cost. The condition monitoring is integrated with the SC protection using the same gate charge detection circuit, which is realized by monitoring the remarkable increase of leakage current for the aged device (from nA to mA). It also shows the advantage in the cost. A physics‐based nonlinear Miller capacitance model is proposed to accurately predict the gate charges between normal and SC conditions.…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

A digital‐controlled gate charge detection circuit for short‐circuit protection and condition monitoring of SiC MOSFET

Yin

Xiong

et al. 2022

IET Power Electronics

The safe and reliable operation of power converter requires a protection circuit with fast response when the power device is subjected to the short‐circuit (SC) fault. In addition, the on‐line condition monitoring circuit is beneficial to provide a suggestion for the replacement of aged device. The silicon carbide (SiC) power devices promise the higher power density in the system performance, but is still limited by the poor SC reliability issue. Thus, it is crucial to improve the robustness of SiC‐based power converter from the circuit design. This work proposes a novel gate charge detection circuit for SiC devices. It achieves a high‐speed SC protection against hard switching fault (HSF) based on the difference of Miller capacitance between normal condition and SC fault. Meanwhile, the condition monitoring is achieved based on the high gate leakage current of aged device. A high‐precision analog amplifier circuit is designed to acquire the gate signal. The normal/fault signal is distinguished and the protection is triggered using a digital‐controlled method to reduce the hardware cost. A 600‐ns SC response time is achieved, and the monitoring circuit can differentiate the aged device from the healthy one.

“…However, these methods are limited by the package of the SiC device. Gate charge detection method has been proposed in [16] to detect the SC, which avoids high voltage (V ds ) and high current (I ds ) measurement. However, this method can only detect the failure during the turn-on transient.…”

Section: Introductionmentioning

confidence: 99%

A Comprehensive Short-Circuit Protection Scheme for Series-Connected SiC MOSFETs

Zhang

IEEE Open J. Power Electron.

et al. 2022

Series connection of devices is an effective way to achieve higher blocking voltage. SiC MOSFETs exhibit narrow short-circuit withstand time and generally much lower short-circuit robustness than silicon IGBTs. This puts a critical concern on their utilization, further stressing the importance of reliable protection. A complete short-circuit protection should be implemented to improve the reliability. In this article, a systematic short-circuit analysis methodology is proposed. Following this methodology, all the possible fault scenarios can be derived. Besides the traditional short-circuit scenarios, some unique short-circuit faults, such as a single device short-or open-circuit, have been found in series-connected SiC MOSFETs. These unique faults may not cause overcurrent, which means the traditional overcurrent-based protection is not applicable. This article proposes a method combining drain-source voltage logic signal and gate signal to comprehensively detect both classic short-circuit scenarios and unique fault scenarios. Another different point in series-connected devices is that the soft turn-off should be synchronized for each serial device to prevent excessive voltage unbalancing. The proposed short-circuit protection scheme is evaluated under each short-circuit scenario. The experimental results demonstrate that the proposed protection scheme can successfully protect the serial devices from further destruction within 500 ns for all short-circuit scenarios.