Development and optimization of high level dataflow programs: The HEVC decoder design case

Jerbi, Khaled; Renzi, Daniele; Jorre, Damien De Saint; Yviquel, Hervé; Raulet, Mickaël; Alberti, Claudio; Mattavelli, Marco

doi:10.1109/acssc.2014.7094857

Cited by 5 publications

(2 citation statements)

References 9 publications

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“…For the aim of this work, a dynamic dataflow model, supported by a standard language [21]- [23], will be briefly introduced. The dataflow approach has shown that it support the development of highly complex realworld applications [24]- [26], the portability on any network of heterogeneous processing nodes including CPUs and reconfigurable HW and the exploration of close-to-optimal configurations without the need of manual rewriting of the application.…”

Section: ) Computational Modelmentioning

confidence: 99%

Methodologies for Synthesizing and Analyzing Dynamic Dataflow Programs in Heterogeneous Systems for Edge Computing

Bloch

Casale-Brunet

Mattavelli

2021

IEEE Open J. Circuits Syst.

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The possibility of using the increasing computing power available in cloud infrastructures requires the development of new approaches for application software development and optimization. Emerging edge computing paradigms offer the possibility of reducing bandwidth needs and of optimizing latency, features particularly relevant for Big Data applications, by bringing computation closer to the user and to the data generation processes. However, edge computing approaches pose several challenges in terms of how to be able to efficiently take advantage of a distributed network of heterogeneous processing nodes. This paper deals with this problem by extending a dynamic dataflow software development framework and related design flow tools to support heterogeneous platforms. The paper describes the methodology steps for the synthesis of application software executing on heterogeneous CPU/GPU co-processing nodes. The steps do include the optimization of the communication between heterogeneous processing elements, a technique for the efficient mapping and parallelization of computation on independent GPU partitions, and the introduction of dynamic programming approach for leveraging the SIMD nature of GPU computing. To complete the methodology of seamless porting of dataflow software and partition on CPU or GPU computing nodes, an automated methodology for exploring the configuration space and to identify high performance working points is developed.

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Section: ) Computational Modelmentioning

confidence: 99%

Methodologies for Synthesizing and Analyzing Dynamic Dataflow Programs in Heterogeneous Systems for Edge Computing

Bloch

Casale-Brunet

Mattavelli

2021

IEEE Open J. Circuits Syst.

Self Cite

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“…The current RVC-CAL description of the HEVC decoder allows calling to native OpenHEVC code to implement several functions [12]. In this work, OpenHEVC functions have been used for the IQ, DB, Intra PB and Inter PB blocks.…”

Section: Rvc-cal + Embedded Openhevc Code Implementationmentioning

confidence: 99%

A DSP-based HEVC decoder implementation using RVC-CAL and native OpenHEVC code

Rodríguez

Balseiro

Chavarrías

et al. 2015

2015 International Symposium on Consumer Electronics (ISCE)

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Complexity of both, applications and processors, is permanently increasing. While, designers must face with a lot of challenges, such as reduced time to market, performance and energy efficiency, among others. In this context, dataflow based methodologies and tools, like the Open RVC-CAL Compiler Infrastructure (Orcc), have revealed powerful in supporting platform independent design. Within the Orcc design flow, applications are described using the RVC-CAL language. A set of Orcc backends can generate different source codes (e.g., C, C++, VHDL, Java) that must be finally compiled for a target platform with a native compiler. This approach has several advantages, but the quality of the final product is limited by the quality of the currently implemented backends. In this work, an HEVC decoder implementation for DSP technology has been developed by using a combination of RVC-CAL descriptions and native Ccode. The results of this approach are compared with those obtained by using both, a pure RVC-CAL description and a pure native C-code implementation.

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Design Space Exploration for Partitioning Dataflow Program on CPU-GPU Heterogeneous System

Bloch,

Casale-Brunet,

Mattavelli

2023

J Sign Process Syst

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Dataflow programming is a methodology that enables the development of high-level, parametric programs that are independent of the underlying platform. This approach is particularly useful for heterogeneous platforms, as it eliminates the need to rewrite application software for each configuration. Instead, it only requires new low-level implementation code, which is typically automatically generated through code generation tools. The performance of programs running on heterogeneous parallel platforms is highly dependent on the partitioning and mapping of computation to different processing units. This is determined by parameters that govern the partitioning, mapping, scheduling, and allocation of data exchanges among the processing elements of the platform. Determining the appropriate parameters for a specific application and set of architectures is a complex task and is an active area of research. This paper presents a novel methodology for partitioning and mapping dataflow programs onto heterogeneous systems composed of both CPUs and GPUs. The objective is to identify the program configuration that provides the most efficient way to process a typical dataflow program by exploring its design space. This is an NP-complete problem that we have addressed by utilizing a design space exploration approach that leverages a Tabu search meta-heuristic optimization algorithm driven by analysis of the execution trace graph of the program. The heuristic algorithm effectively identifies a solution that maps actors to processing units while improving overall performance. The parameters of the heuristic algorithm, such as the time limit and the proportion of neighboring solutions explored during each iteration, can be fine-tuned for optimal results. Additionally, the proposed approach allows for the exploration of solutions that do not utilize all hardware resources if it results in better performance. The effectiveness of the proposed approach is demonstrated through experimental results on dataflow programs.

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Development and optimization of high level dataflow programs: The HEVC decoder design case

Cited by 5 publications

References 9 publications

Methodologies for Synthesizing and Analyzing Dynamic Dataflow Programs in Heterogeneous Systems for Edge Computing

Methodologies for Synthesizing and Analyzing Dynamic Dataflow Programs in Heterogeneous Systems for Edge Computing

A DSP-based HEVC decoder implementation using RVC-CAL and native OpenHEVC code

Design Space Exploration for Partitioning Dataflow Program on CPU-GPU Heterogeneous System

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