1988
DOI: 10.1109/16.2542
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Development and experimental verification of a two-dimensional numerical model of piezoelectrically induced threshold voltage shifts in GaAs MESFETs

Abstract: The results of a combined experimental and analytical investigation of the effects of mechanical stress on DC electrical parameters, particularly threshold voltage, in MESFETs are reported. The theoretical aspect of this study involves a two-dimensional finite element simulation of the same device structure on which measurements were made. In contrast with an approximate analytical calculation reported in the literature in which the stress concentrations which occur at the gate edges were represented by concen… Show more

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Cited by 27 publications
(6 citation statements)
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“…GaAs substrate has the elastic constants of ∼85 GPa for Young's modulus. The WSi used for the gatemetal and SiO 2 for passivation-film have ∼620 and 70 GPa for Young's modulus, respectively [14]. In this device structure, the piezoelectric charge induced in the FET channel region by stress was intentionally used to optimize the gm-profile.…”
Section: A Gaas Hjfet For the First Stage Of Cascode Configurationmentioning
confidence: 99%
“…GaAs substrate has the elastic constants of ∼85 GPa for Young's modulus. The WSi used for the gatemetal and SiO 2 for passivation-film have ∼620 and 70 GPa for Young's modulus, respectively [14]. In this device structure, the piezoelectric charge induced in the FET channel region by stress was intentionally used to optimize the gm-profile.…”
Section: A Gaas Hjfet For the First Stage Of Cascode Configurationmentioning
confidence: 99%
“…However, the gate-controlling capability will be reduced by the penetration of the electric field from the sidewall at both sides of the gate, and the threshold voltage of a short gate-length device will be influenced by the drain bias. The short gate-length effect can be exactly analyzed by numerical simulation, based on a full set of semiconductor device equations with reasonable boundary conditions [ 11- [3]. However, the numerical simulation is limited by the computation time and is difficult to use in circuit analysis.…”
Section: Introductionmentioning
confidence: 99%
“…The mechanical stresses imposed on the substrate by such metal or dielectric overlayers lead to large regions of uncontrollable piezoelectric charge in the active regions of a device [2]- [5] and have a serious impact on the electrical performance of these devices, e.g., stress-induced threshold voltage shifts of the order of 500 mV in some situations [6]. Furthermore, in the event of these overlayers being responsible for defect generation within the substrate, it is well known that the proximity of these crystalline defects or dislocations is correlated with changes in the electrical characteristics of 111-V device structures [2], [4], [7].…”
Section: Introduction He Impact Of Device Processing and The Need mentioning
confidence: 99%
“…Using the model described in [5], a simplified metal strip test structure, assuming a biaxial metallization stress for all contacts of lo7 Nm-', was simulated by means of a finite element method stress analysis. The results are shown in Fig.…”
mentioning
confidence: 99%
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