2011
DOI: 10.2172/1031164
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Developement of 3D Vertically Integrated Pattern Recognition Associative Memory (VIPRAM)

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Cited by 2 publications
(1 citation statement)
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“…The possibility of employing this technology for sensor fabrication is at the forefront of solid state detector developments, opening the possibility of fabricating sensor, amplifier, digital processor in separate, optimized processes, and then stacking them together after reducing the single chip thickness to 10 µm or less. Besides the advantage of improving the performance of traditional detectors, this vertical integration technologies can also be used to design smart detectors [17], in which multiple hits are combined locally, possibly measuring track segments instead of single points, and providing crucial information to resolve the trigger and event overlap problems at high luminosity LHC [18].…”
Section: Pos(eps-hep 2013)147mentioning
confidence: 99%
“…The possibility of employing this technology for sensor fabrication is at the forefront of solid state detector developments, opening the possibility of fabricating sensor, amplifier, digital processor in separate, optimized processes, and then stacking them together after reducing the single chip thickness to 10 µm or less. Besides the advantage of improving the performance of traditional detectors, this vertical integration technologies can also be used to design smart detectors [17], in which multiple hits are combined locally, possibly measuring track segments instead of single points, and providing crucial information to resolve the trigger and event overlap problems at high luminosity LHC [18].…”
Section: Pos(eps-hep 2013)147mentioning
confidence: 99%