Deterministic Assembly of Functional Nanostructures Using Nonuniform Electric Fields

Smith, Benjamin; Mayer, Theresa S.; Keating, Christine D.

doi:10.1146/annurev-physchem-032210-103346

Cited by 53 publications

(67 citation statements)

References 105 publications

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“…It allows for dielectrophoretic assembly at a low-enough frequency, where the dielectrophoretic force is independent of nanotube permittivity so that both metallic and semiconducting nanotubes can be deposited simultaneously 30 . It also reduces the solution conductivity (s sol ) and therefore increases the magnitude of the dielectrophoretic force on the nanotubes, which is proportional to (s tube À s sol )/s sol , where s tube is the conductivity of carbon nanotubes 22 . A function generator supplies the alternating voltage signal (sinusoid with a peak-to-peak voltage of 5 V and a frequency of 400 kHz) to the electrodes for 4 min, and a final wash with deionized water completes the assembly process.…”

Section: Resultsmentioning

confidence: 99%

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Fringing-field dielectrophoretic assembly of ultrahigh-density semiconducting nanotube arrays with a self-limited pitch

2014

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One key challenge of realizing practical high-performance electronic devices based on singlewalled carbon nanotubes is to produce electronically pure nanotube arrays with both a minuscule and uniform inter-tube pitch for sufficient device-packing density and homogeneity. Here we develop a method in which the alternating voltage-fringing electric field formed between surface microelectrodes and the substrate is utilized to assemble semiconducting nanotubes into well-aligned, ultrahigh-density and submonolayered arrays, with a consistent pitch as small as 21±6 nm determined by a self-limiting mechanism, based on the unique field focusing and screening effects of the fringing field. Field-effect transistors based on such nanotube arrays exhibit record high device transconductance (450 mS mm À 1 ) and decent on current per nanotube (B1 mA per tube) together with high on/off ratios at a drain bias of À 1 V.

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Section: Resultsmentioning

confidence: 99%

“…It utilizes an inhomogeneous electric field, typically formed between a pair of planar microelectrodes, to manipulate the placement of nanomaterials via interaction with their induced dipole moment 22 . However, limited success has been achieved with carbon nanotubes.…”

mentioning

confidence: 99%

Fringing-field dielectrophoretic assembly of ultrahigh-density semiconducting nanotube arrays with a self-limited pitch

2014

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“…Therefore, the DEP force needs to overcome those effects in order to effectively perform deposition. Additionally, the DEP force will always depend on the ratio between the electrodes gap and NW lengths (Figure 2b), as this ratio influences the electric field lines density covering the NW and thus the applied torque [35]. The DEP force is maximized (attraction force, see in Figure 2b) for a ratio of around 0.8, since the electric field gradient and strength effects are the largest for this ratio [36].…”

Section: Dep Theorymentioning

confidence: 99%

“…For a smaller gap, the DEP force decreases because, despite that the electric field applied at the gap centre remains constant, it is reduced around the entire NW length. On the other hand, for a larger gap, the DEP force also decreases, simply because the electric field around the NW is less intense [5,35,36]. In this work, for NiNWs length of (4 ± 1) µm, we used a gap length of (2.5 ± 0.3) µm, yielding a ratio of (0.6 ± 0.2), which is near the maximum DEP force condition.…”

Section: Dep Theorymentioning

confidence: 99%

Electrical Manipulation of a Single Nanowire by Dielectrophoresis

Santos¹,

Béron²,

RobertoPirota³

et al. 2017

Nanowires - New Insights

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Nanowires (NWs), due to their unique highly anisotropic characteristics, hold a great promise to be used in wide technological fields, such as building blocks for data storage and memory, advanced scanning probes, and biotechnological applications. In addition, given the high sensitivity to their environment, NWs can be used as sensor for a number of applications. The fabrication and electrical characterization of NW-based devices can be achieved after proper placing of NWs between electrodes, which represents one of the major challenges in this field. The dielectrophoresis (DEP) method can be used to trap electrically neutral NWs by the application of an alternating electric field between a pair of electrodes. Here, we present a systematic study of DEP parameters as well as electrodes geometry for NW deposition. This method presents a suitable protocol for deposition in a useful and coherent fashion of post-growth electrodeposited NWs and further electrical characterization. This can be used for investigation of the fundamental transport properties of individual NWs and fabrication of NW-based devices, such as sensors and field-effect transistors.

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“…The integration of these dissimilar materials will require novel Si fab compatible fabrication techniques. One approach showing significant promise is the electrostatic assisted self-assembly technique being developed at Penn State [37]. The approach is being used to integrate 'chemically functionalized' metallic and semiconducting nanowires and 'chiplets' onto Si CMOS wafers to create chemical and biological sensors.…”

Section: Future Prospectsmentioning

confidence: 99%

Beyond CMOS: heterogeneous integration of III–V devices, RF MEMS and other dissimilar materials/devices with Si CMOS to create intelligent microsystems

Kazior

2014

Phil. Trans. R. Soc. A.

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Advances in silicon technology continue to revolutionize micro-/nano-electronics. However, Si cannot do everything, and devices/components based on other materials systems are required. What is the best way to integrate these dissimilar materials and to enhance the capabilities of Si, thereby continuing the micro-/nano-electronics revolution? In this paper, I review different approaches to heterogeneously integrate dissimilar materials with Si complementary metal oxide semiconductor (CMOS) technology. In particular, I summarize results on the successful integration of III-V electronic devices (InP heterojunction bipolar transistors (HBTs) and GaN high-electron-mobility transistors (HEMTs)) with Si CMOS on a common silicon-based wafer using an integration/fabrication process similar to a SiGe BiCMOS process (BiCMOS integrates bipolar junction and CMOS transistors). Our III-V BiCMOS process has been scaled to 200 mm diameter wafers for integration with scaled CMOS and used to fabricate radio-frequency (RF) and mixed signals circuits with on-chip digital control/calibration. I also show that RF microelectromechanical systems (MEMS) can be integrated onto this platform to create tunable or reconfigurable circuits. Thus, heterogeneous integration of III-V devices, MEMS and other dissimilar materials with Si CMOS enables a new class of high-performance integrated circuits that enhance the capabilities of existing systems, enable new circuit architectures and facilitate the continued proliferation of low-cost micro-/nano-electronics for a wide range of applications.

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Deterministic Assembly of Functional Nanostructures Using Nonuniform Electric Fields

Cited by 53 publications

References 105 publications

Fringing-field dielectrophoretic assembly of ultrahigh-density semiconducting nanotube arrays with a self-limited pitch

Fringing-field dielectrophoretic assembly of ultrahigh-density semiconducting nanotube arrays with a self-limited pitch

Electrical Manipulation of a Single Nanowire by Dielectrophoresis

Beyond CMOS: heterogeneous integration of III–V devices, RF MEMS and other dissimilar materials/devices with Si CMOS to create intelligent microsystems

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