Designs and analysis of non-volatile memory cells for single event upset (SEU) tolerance

Wei, Wei; Lombardi, Fabrizio; Namba, Kazuteru

doi:10.1109/dft.2014.6962061

Cited by 2 publications

(1 citation statement)

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“…BLD senses the stored data in the selected eDRAM (note that if the data stored in the eDRAM is lost due to a soft error, the correct data can be read from the RRAM [12]). …”

Section: Non-volatile Hybrid Memorymentioning

confidence: 99%

Novel Designs of Embedded Hybrid Cells for High Performance Memory Circuits

Lombardi

Wei²,

Namba

2015

Proceedings of the 25th Edition on Great Lakes Symposium on VLSI

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Memory design has radically changed in the last few years; the emergence of new technologies has further improved performance and the traditional separation of storage levels between Static Random Access Memory (SRAM) and Dynamic Random Access Memory (DRAM) is not viable as in the past. Recently, the embedded DRAM (eDRAM) has been proposed for cache utilization to improve density while attempting to retain high performance operations; this scheme is often referred as hybrid due to the utilization of different technologies in a memory. In this paper, a hybrid scheme is proposed by adding non-volatile features and related circuits to the SRAM/eDRAM; an Oxide Resistive Random Access Memory (RRAM) is utilized as nonvolatile storage in the embedded memory circuit. Different memory cells are proposed in this manuscript; they are evaluated with respect to circuit-level figures of merit as related to operational features (read, write, static noise margin, power delay product) as well as tolerance to event upsets (critical charge) and variations. Extensive simulation results using nanometric PTMs are provided. It is shown that the proposed designs offer substantial improvements over previous hybrid cells as well as a conventional NAND Flash memory cell.

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“…BLD senses the stored data in the selected eDRAM (note that if the data stored in the eDRAM is lost due to a soft error, the correct data can be read from the RRAM [12]). …”

Section: Non-volatile Hybrid Memorymentioning

confidence: 99%