Design to Introduce On-chip Fine Tunability in Analog Active Inductor

Kapur, Garima; Bhola, Kapil; Markan, C. M.

doi:10.1109/isvlsi.2011.41

2011 IEEE Computer Society Annual Symposium on VLSI 2011

DOI: 10.1109/isvlsi.2011.41

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Design to Introduce On-chip Fine Tunability in Analog Active Inductor

Garima Kapur

Kapil Bhola

C. M. Markan

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Cited by 2 publications

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“…Using hardware results FGMOS simulation model have been verified. The model is flexible and can be used at wide operating frequency range, thus can be used to introduce on-chip tuning ability, programming ability in RF to low frequency analog signal processing devices [21,22]. Using a capacitive feedback in the FGMOS structure, the change in FG feedback through capacitor to increase injection under continuous tunneling which in turn, self adapt this change of charge at FG.…”

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confidence: 99%

Design of a Floating Gate Synapse Simulation Model

Kapur¹

2019

IJRTE

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Proposing a simulation model of Floating-gate (FG) MOSFET whose characteristics when operated at sub-threshold conduction are like a synapse of brain. It can store, program, and adapt information (charge). The model consists of empirical equations and its parameter values have been extracted from fabricated results. The post fabrication programming of charge at the FG have been observed using two quantum-controlled processes (Fowler Northeim tunneling & hot electron injection) with the help of externally applied voltages, which in turn program FGMOS characteristics like threshold voltage, Vth. The programming is non-volatile and stable with changing temperature (4µV/°C) and noise. The Vth programming range is varied by more than 7V to 8V of its original value with very high bit (about 13-bit) of programming precision/resolution. The model layout/mask consume maximum of 130×90 μm2 of chip area and average power consumed by model is around 0.315mW. This verified FG simulation model can introduce the concept of on-chip tuning ability, programming ability, reconfiguring ability in precision analog signal processing designs like inductor, filters, controller circuits, voltage-controlled oscillators, etc. On adding adequate feedback mechanism to FGMOS model, it shows self-adaption of FG charge, which can be used to emulate features of a neuron/synapse in CMOS based neuromorphic circuits emulating several cognitive behaviors of human brain like Winner takes all circuits, circuits generating spikes (STDP), etc.

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confidence: 99%

Design of a Floating Gate Synapse Simulation Model

Kapur¹

2019

IJRTE

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Design of low distortion active inductor and its applications

Sato

Ito

2012

Analog Integr Circ Sig Process

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Design to Introduce On-chip Fine Tunability in Analog Active Inductor

Cited by 2 publications

References 13 publications

Design of a Floating Gate Synapse Simulation Model

Design of a Floating Gate Synapse Simulation Model

Design of low distortion active inductor and its applications

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