2019 22nd Euromicro Conference on Digital System Design (DSD) 2019
DOI: 10.1109/dsd.2019.00080
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Design of SRAM-Based Low-Cost SEU Monitor for Self-Adaptive Multiprocessing Systems

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Cited by 17 publications
(9 citation statements)
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“…However, for the self-adaptive systems for space applications it is important that the particle monitor is embedded into the target system in order to detect the radiation conditions to which the target system is exposed during the mission. An embedded low-cost SRAM-based SEU monitor is intended to be used in the online phase for the real-time SEU measurement [27]. It is essential to mention that the existing SRAM resources are utilized for SEU measurement, which minimized the area and power overhead.…”
Section: System Overviewmentioning
confidence: 99%
“…However, for the self-adaptive systems for space applications it is important that the particle monitor is embedded into the target system in order to detect the radiation conditions to which the target system is exposed during the mission. An embedded low-cost SRAM-based SEU monitor is intended to be used in the online phase for the real-time SEU measurement [27]. It is essential to mention that the existing SRAM resources are utilized for SEU measurement, which minimized the area and power overhead.…”
Section: System Overviewmentioning
confidence: 99%
“…As alternative to the conventional stand-alone SRAM-based particle detectors described in previous Section, we have proposed the use of embedded SRAM as a particle detector [35]. The idea is to employ the standard on-chip SRAM memory as a particle detector in parallel to its normal data storage function.…”
Section: Embedded Sram As a Particle Detectormentioning
confidence: 99%
“…Any error that cannot be corrected by EDAC is considered as a permanent error. A detailed description of the algorithm for detection of single, double and permanent faults can be found in [35]. The number of detected faults is stored in the Register File to avoid duplicate counting of the double and permanent faults.…”
Section: Embedded Sram As a Particle Detectormentioning
confidence: 99%
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“…When a faulty row is read, a long codeword (including check bits) is read from the PCM and the DRAM, and data are decoded from it. In Reference [53], Chen et al propose an SEU monitor (basically, an error counter) to be integrated into an SRAM with EDAC (error detection and correction) and scrubbing.…”
mentioning
confidence: 99%