Design of Silicon Photonic Interconnect ICs in 65-nm CMOS Technology

Bae, Woorham; Jeong, Gyu-Seob; Kim, Yoonsoo; Chi, Hankyu; Jeong, Deog‐Kyoon

doi:10.1109/tvlsi.2015.2504459

Cited by 14 publications

(15 citation statements)

References 29 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…CMOS circuits, such as a vertical-cavity surface-emitting laser (VCSELs) driver, an optical modulator driver, and a trans-impedance amplifier (TIA) developed in prior works [13][14][15], are very useful for the optically connected automotive networks. The convergence of optical power delivery and silicon photonics can overcome the issues described in Section I; this work proposes a key technology for realizing the convergence.…”

Section: Proposed Architecturementioning

confidence: 99%

Design of a Transceiver Transmitting Power, Clock, and Data over a Single Optical Fiber for Future Automotive Network System

Bae¹,

Ju²,

Jeong³

2017

JSTS:Journal of Semiconductor Technology and Science

Self Cite

View full text Add to dashboard Cite

Abstract-This paper proposes a new link structure that transmits power, clock, and data through a single optical fiber for a future automotive network. A pulseposition modulation (PPM) technique is adopted to guarantee a DC-balanced signal for robust power transmission regardless of transmitted data pattern. Further, circuit implementations and theoretical analyses for the proposed PPM transceiver are described in this paper. A prototype transceiver fabricated in 65-nm CMOS technology, is used to verify the PPM signaling part of the proposed system. The prototype achieves a 10 -13 bit-error rate and 0.188-UI high frequency jitter tolerance while consuming 14 mW at 800 Mb/s.

show abstract

Section: Proposed Architecturementioning

confidence: 99%

Design of a Transceiver Transmitting Power, Clock, and Data over a Single Optical Fiber for Future Automotive Network System

Bae¹,

Ju²,

Jeong³

2017

JSTS:Journal of Semiconductor Technology and Science

Self Cite

View full text Add to dashboard Cite

show abstract

“…13. Cascoded inverter output stage to double the voltage swing [26], M N3 and M P3 are used to prevent unwanted peaking during transition between two voltage levels. C PE and C PO are the capacitance comes from the pads in electrical and optical chips, respectively, r damp is the damping resistor to decrease the overshoot in transient of output, L b is the inductance from wire bounding, and C P is the parasitic capacitance at the output node.…”

Section: B Driving Channelmentioning

confidence: 99%

“…Considering the limited voltage head room in submicron CMOS process, a cascoded configuration (Fig. 13) is adopted in order to achieve the required voltage swing, which is widely used for optical modulators [25], [26]. The cascoded output stage used here needs two inputs voltage levels (see Fig.…”

Section: ) Output Stagementioning

confidence: 99%

CMOS-Photonics Codesign of an Integrated DAC-Less PAM-4 Silicon Photonic Transmitter

Sepehrian

Yekani

Rusch

et al. 2016

IEEE Trans. Circuits Syst. I

View full text Add to dashboard Cite

Co-design and integration of optical modulators and CMOS drivers is crucial for high-speed silicon photonic (SiP) transmitters to reach their full potential for low-cost, low-power electronic-photonic integrated systems. We present a CMOSdriven SiP multi-level optical transmitter implemented using a commercially available lateral p-n junction process. It uses a Mach-Zehnder modulator (MZM) segmented to increase speed and to lower the required power on a per segment basis to a level achievable with CMOS. A multi-channel driver is designed and implemented in 130 nm RF CMOS, providing a swing of 4 V in a push-pull configuration at 20 Gbaud. Binary data at the CMOS input is manipulated via digital logic to produce the proper persegment drive signals to generate a four-level pulse-amplitude modulation optical signal. Multi-level modulation is achieved using only binary signals as input (DAC-less). Co-simulation of the optical and electrical circuits shows good agreement with experiment. Reliable transmission is achieved without postcompensation at 28 Gb/s, and at 38 Gb/s when using postcompensation.

show abstract

“…What makes things worse is that the gate-overdrive voltage of analog circuits should be decreased as the voltage headroom reduces, which increases the sensitivity of analog circuits to the device mismatch [5]. We can observe such trend in Figure 1, which compares the stacked common-source (CS) amplifier to the non-stacked CS amplifier [6,7]. Figure 1a,b shows the normalized gain of CS amplifiers with respect to V DD /V TH and the normalized large-signal bandwidth with respect to the normalized current dissipation, respectively.…”

Section: Introductionmentioning

confidence: 98%

CMOS Inverter as Analog Circuit: An Overview

Bae

2019

JLPEA

Self Cite

View full text Add to dashboard Cite

Since the CMOS technology scaling has focused on improving digital circuit, the design of conventional analog circuits has become more and more difficult. To overcome this challenge, there have been a lot of efforts to replace conventional analog circuits with digital implementations. Among those approaches, this paper gives an overview of the latest achievement on utilizing a CMOS inverter as an analog circuit. Analog designers have found that a simple resistive feedback pulls a CMOS inverter into an optimum biasing for analog operation. Recently developed applications of the resistive-feedback inverter, including CMOS inverter as amplifier, high-speed buffer, and output driver for high-speed link, are introduced and discussed in this paper.

show abstract

Design of Silicon Photonic Interconnect ICs in 65-nm CMOS Technology

Cited by 14 publications

References 29 publications

Design of a Transceiver Transmitting Power, Clock, and Data over a Single Optical Fiber for Future Automotive Network System

Design of a Transceiver Transmitting Power, Clock, and Data over a Single Optical Fiber for Future Automotive Network System

CMOS-Photonics Codesign of an Integrated DAC-Less PAM-4 Silicon Photonic Transmitter

CMOS Inverter as Analog Circuit: An Overview

Contact Info

Product

Resources

About