Design of Paper Defect Extraction IP Core Based on FPGA

Abstract

A set of paper defect extraction IP core based on FPGA is introduced in this paper. Relying on FPGA powerful data processing capabilities and parallel architecture, the paper image acquisition, pre-processing and defect extraction function were achieved in an IP core. The IP core has been testing and running in some paper defect detection and recognition systems. As a result the system was stable and reliable which could ensure to achieve a paper defect extraction function. And it contributes to the design of paper defect detection and recognition system.