Design of Optimal Carry Skip Adder and Carry Skip BCD Adder Using Reversible Logic Gates

Murugesan,

doi:10.3844/jcssp.2014.723.728

Cited by 4 publications

(2 citation statements)

References 15 publications

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“…The CSKA implemented using the modified TSG (MTSG) for parallel addition. The Carry Skip BCD Adder implemented using the MTSG for 4 bit parallel addition and the carry skip logic module consists of one FREDKIN and 3 PERES gate's [5].…”

Section: Introductionmentioning

confidence: 99%

Implementation of Low Power Carry Skip Adder using Reversible Logic

Ramesh*¹

2019

IJRTE

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Addition is a vital arithmetic operation. It is the base of commonly used arithmetic operations such as division, subtraction, and multiplication. Adder is a digital circuit that accomplishes addition of numbers. The one bit full adder is the basic block of an arithmetic unit. There are several adder designs implemented so far to reduce the power. However, each design suffers from exact drawback. Reversible logic is the growing technology in the current era. The numbers of input and output lines in reversible logic are equal. In reversible logic the inputs are to be recovered from the outputs. Reversible logic gates are defined by the user. In this paper Carry Skip Adder (CSKA) is implemented in two different designs i.e. design-I and design-II. Design-I is implemented using Peres gates with irreversible (XOR, AND, OR) logic gates. Design-II is implemented using PERES, TOFFOLI, and FREDKIN reversible logic gates. Design-I and design-II designs are synthesized and simulated by Mentor Graphics tool. Design-II is more efficient in terms of transistor count and power consumption compared to DesignI.

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Section: Introductionmentioning

confidence: 99%

Implementation of Low Power Carry Skip Adder using Reversible Logic

Ramesh*¹

2019

IJRTE

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“…The optical cost of a reversible logic gate is defined as the number of MZI switches used in its all optical implementation. This design forms the basis for different quantum ALU and embedded processors (Murugesan and Keppanagounder, 2014).…”

Section: Introductionmentioning

confidence: 99%

All Optical Implementation of High Speed and Low Power Reversible Full Adder Using Semiconductor Optical Amplifier Based Mach-Zehnder Interferometer

Bommi¹

2014

Journal of Computer Science

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In the recent years reversible logic design has promising applications in low power computing, optical computing, quantum computing. VLSI design mainly concentrates on low power logic circuit design. In the present scenario researchers have made implementations of reversible logic gates in optical domain for its low energy consumption and high speed. This study is all about designing a reversible Full adder using combination of all optical Toffoli and all optical TNOR and to compare it with the Full adder designed using all optical Toffoli gate in terms of optical cost. All optical TNOR gate can work as a replacement of existing NAND based All optical Toffoli Gate (TG). The gates are designed using MachZehnder Interferometer (MZI) based optical switch. The proposed system is developed with the basic of reversibility to design all optical full Adder implemented with CMOS transistors. The design is efficient in terms of both architecture and in power consumption.

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An efficient design for reversible Wallace unsigned multiplier

PourAliAkbar

Mosleh

2019

Theoretical Computer Science

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Design of Optimal Carry Skip Adder and Carry Skip BCD Adder Using Reversible Logic Gates

Cited by 4 publications

References 15 publications

Implementation of Low Power Carry Skip Adder using Reversible Logic

Implementation of Low Power Carry Skip Adder using Reversible Logic

All Optical Implementation of High Speed and Low Power Reversible Full Adder Using Semiconductor Optical Amplifier Based Mach-Zehnder Interferometer

An efficient design for reversible Wallace unsigned multiplier

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